45c45,46
< ld reg, intseg, [1, t1, t0], "IntAddrPrefixIO << 3", addressSize=8
---
> ld reg, intseg, [1, t1, t0], "IntAddrPrefixIO << 3", addressSize=8, \
> nonSpec=True
50c51,52
< ld reg, intseg, [1, t2, t0], "IntAddrPrefixIO << 3", addressSize=8
---
> ld reg, intseg, [1, t2, t0], "IntAddrPrefixIO << 3", addressSize=8, \
> nonSpec=True
56c58,59
< st reg, intseg, [1, t1, t0], "IntAddrPrefixIO << 3", addressSize=8
---
> st reg, intseg, [1, t1, t0], "IntAddrPrefixIO << 3", addressSize=8, \
> nonSpec=True
61c64,65
< st regm, intseg, [1, t2, t0], "IntAddrPrefixIO << 3", addressSize=8
---
> st regm, intseg, [1, t2, t0], "IntAddrPrefixIO << 3", addressSize=8, \
> nonSpec=True