interrupts_and_exceptions.py (6344:b7104eda0795) | interrupts_and_exceptions.py (6645:c248b0348d85) |
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1# Copyright (c) 2007-2008 The Hewlett-Packard Development Company 2# All rights reserved. 3# 4# Redistribution and use of this software in source and binary forms, 5# with or without modification, are permitted provided that the 6# following conditions are met: 7# 8# The software must be used only for Non-Commercial Use which means any --- 48 unchanged lines hidden (view full) --- 57def macroop IRET_REAL { 58 panic "Real mode iret isn't implemented!" 59}; 60 61def macroop IRET_PROT { 62 .adjust_env oszIn64Override 63 64 # Check for a nested task. This isn't supported at the moment. | 1# Copyright (c) 2007-2008 The Hewlett-Packard Development Company 2# All rights reserved. 3# 4# Redistribution and use of this software in source and binary forms, 5# with or without modification, are permitted provided that the 6# following conditions are met: 7# 8# The software must be used only for Non-Commercial Use which means any --- 48 unchanged lines hidden (view full) --- 57def macroop IRET_REAL { 58 panic "Real mode iret isn't implemented!" 59}; 60 61def macroop IRET_PROT { 62 .adjust_env oszIn64Override 63 64 # Check for a nested task. This isn't supported at the moment. |
65 rflag t1, NT | 65 rflag t1, 14; #NT bit |
66 panic "Task switching with iret is unimplemented!", flags=(nCEZF,) 67 68 #t1 = temp_RIP 69 #t2 = temp_CS 70 #t3 = temp_RFLAGS 71 #t4 = handy m5 register 72 73 # Pop temp_RIP, temp_CS, and temp_RFLAGS --- 173 unchanged lines hidden --- | 66 panic "Task switching with iret is unimplemented!", flags=(nCEZF,) 67 68 #t1 = temp_RIP 69 #t2 = temp_CS 70 #t3 = temp_RFLAGS 71 #t4 = handy m5 register 72 73 # Pop temp_RIP, temp_CS, and temp_RFLAGS --- 173 unchanged lines hidden --- |