bit_scan.py (5415:5c28e3dbdc8e) bit_scan.py (5423:536fb3cc5a9b)
1# Copyright (c) 2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 111 unchanged lines hidden (view full) ---

120 ori t4, reg, 0x2
121 mov reg, reg, t4, flags=(nCEZF,)
122 mov t1, t1, t3, flags=(nCEZF,)
123
124 # Bit 1
125 srli t3, t1, 1, dataSize=8, flags=(EZF,)
126 ori t4, reg, 0x1
127 mov reg, reg, t4, flags=(nCEZF,)
1# Copyright (c) 2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright

--- 111 unchanged lines hidden (view full) ---

120 ori t4, reg, 0x2
121 mov reg, reg, t4, flags=(nCEZF,)
122 mov t1, t1, t3, flags=(nCEZF,)
123
124 # Bit 1
125 srli t3, t1, 1, dataSize=8, flags=(EZF,)
126 ori t4, reg, 0x1
127 mov reg, reg, t4, flags=(nCEZF,)
128 mov t1, t1, t3, flags=(nCEZF,)
129
130end:
131 fault "NoFault"
132};
133
134def macroop BSR_R_M {
135
136 movi t1, t1, t0, dataSize=8

--- 35 unchanged lines hidden (view full) ---

172 ori t4, reg, 0x2
173 mov reg, reg, t4, flags=(nCEZF,)
174 mov t1, t1, t3, flags=(nCEZF,)
175
176 # Bit 1
177 srli t3, t1, 1, dataSize=8, flags=(EZF,)
178 ori t4, reg, 0x1
179 mov reg, reg, t4, flags=(nCEZF,)
128
129end:
130 fault "NoFault"
131};
132
133def macroop BSR_R_M {
134
135 movi t1, t1, t0, dataSize=8

--- 35 unchanged lines hidden (view full) ---

171 ori t4, reg, 0x2
172 mov reg, reg, t4, flags=(nCEZF,)
173 mov t1, t1, t3, flags=(nCEZF,)
174
175 # Bit 1
176 srli t3, t1, 1, dataSize=8, flags=(EZF,)
177 ori t4, reg, 0x1
178 mov reg, reg, t4, flags=(nCEZF,)
180 mov t1, t1, t3, flags=(nCEZF,)
181
182end:
183 fault "NoFault"
184};
185
186def macroop BSR_R_P {
187
188 rdip t7

--- 36 unchanged lines hidden (view full) ---

225 ori t4, reg, 0x2
226 mov reg, reg, t4, flags=(nCEZF,)
227 mov t1, t1, t3, flags=(nCEZF,)
228
229 # Bit 1
230 srli t3, t1, 1, dataSize=8, flags=(EZF,)
231 ori t4, reg, 0x1
232 mov reg, reg, t4, flags=(nCEZF,)
179
180end:
181 fault "NoFault"
182};
183
184def macroop BSR_R_P {
185
186 rdip t7

--- 36 unchanged lines hidden (view full) ---

223 ori t4, reg, 0x2
224 mov reg, reg, t4, flags=(nCEZF,)
225 mov t1, t1, t3, flags=(nCEZF,)
226
227 # Bit 1
228 srli t3, t1, 1, dataSize=8, flags=(EZF,)
229 ori t4, reg, 0x1
230 mov reg, reg, t4, flags=(nCEZF,)
233 mov t1, t1, t3, flags=(nCEZF,)
234
235end:
236 fault "NoFault"
237};
238
239def macroop BSF_R_R {
240 # Determine if the input was zero, and also move it to a temp reg.
241 mov t1, t1, t0, dataSize=8
242 and t1, regm, regm, flags=(ZF,)
243 bri t0, label("end"), flags=(CZF,)
244
245 # Zero out the result register
246 movi reg, reg, 0
247
248 subi t2, t1, 1
249 xor t1, t2, t1
250
231
232end:
233 fault "NoFault"
234};
235
236def macroop BSF_R_R {
237 # Determine if the input was zero, and also move it to a temp reg.
238 mov t1, t1, t0, dataSize=8
239 and t1, regm, regm, flags=(ZF,)
240 bri t0, label("end"), flags=(CZF,)
241
242 # Zero out the result register
243 movi reg, reg, 0
244
245 subi t2, t1, 1
246 xor t1, t2, t1
247
248
251 # Bit 6
249 # Bit 6
252 srli t3, t1, 32, dataSize=8
253 andi t4, t3, 32, flags=(EZF,)
254 or reg, reg, t4
250 srli t3, t1, 32, dataSize=8, flags=(EZF,)
251 ori t4, reg, 32
252 mov reg, reg, t4, flags=(nCEZF,)
255 mov t1, t1, t3, flags=(nCEZF,)
256
257 # Bit 5
253 mov t1, t1, t3, flags=(nCEZF,)
254
255 # Bit 5
258 srli t3, t1, 16, dataSize=8
259 andi t4, t3, 16, flags=(EZF,)
260 or reg, reg, t4
256 srli t3, t1, 16, dataSize=8, flags=(EZF,)
257 ori t4, reg, 16
258 mov reg, reg, t4, flags=(nCEZF,)
261 mov t1, t1, t3, flags=(nCEZF,)
262
263 # Bit 4
259 mov t1, t1, t3, flags=(nCEZF,)
260
261 # Bit 4
264 srli t3, t1, 8, dataSize=8
265 andi t4, t3, 8, flags=(EZF,)
266 or reg, reg, t4
262 srli t3, t1, 8, dataSize=8, flags=(EZF,)
263 ori t4, reg, 8
264 mov reg, reg, t4, flags=(nCEZF,)
267 mov t1, t1, t3, flags=(nCEZF,)
268
269 # Bit 3
265 mov t1, t1, t3, flags=(nCEZF,)
266
267 # Bit 3
270 srli t3, t1, 4, dataSize=8
271 andi t4, t3, 4, flags=(EZF,)
272 or reg, reg, t4
268 srli t3, t1, 4, dataSize=8, flags=(EZF,)
269 ori t4, reg, 4
270 mov reg, reg, t4, flags=(nCEZF,)
273 mov t1, t1, t3, flags=(nCEZF,)
274
275 # Bit 2
271 mov t1, t1, t3, flags=(nCEZF,)
272
273 # Bit 2
276 srli t3, t1, 2, dataSize=8
277 andi t4, t3, 2, flags=(EZF,)
278 or reg, reg, t4
274 srli t3, t1, 2, dataSize=8, flags=(EZF,)
275 ori t4, reg, 2
276 mov reg, reg, t4, flags=(nCEZF,)
279 mov t1, t1, t3, flags=(nCEZF,)
280
281 # Bit 1
277 mov t1, t1, t3, flags=(nCEZF,)
278
279 # Bit 1
282 srli t3, t1, 1, dataSize=8
283 andi t4, t3, 1, flags=(EZF,)
284 or reg, reg, t4
285 mov t1, t1, t3, flags=(nCEZF,)
280 srli t3, t1, 1, dataSize=8, flags=(EZF,)
281 ori t4, reg, 1
282 mov reg, reg, t4, flags=(nCEZF,)
286
287end:
288 fault "NoFault"
289};
290
291def macroop BSF_R_M {
292
293 mov t1, t1, t0, dataSize=8

--- 5 unchanged lines hidden (view full) ---

299
300 # Zero out the result register
301 mov reg, reg, t0
302
303 subi t2, t1, 1
304 xor t1, t2, t1
305
306 # Bit 6
283
284end:
285 fault "NoFault"
286};
287
288def macroop BSF_R_M {
289
290 mov t1, t1, t0, dataSize=8

--- 5 unchanged lines hidden (view full) ---

296
297 # Zero out the result register
298 mov reg, reg, t0
299
300 subi t2, t1, 1
301 xor t1, t2, t1
302
303 # Bit 6
307 srli t3, t1, 32, dataSize=8
308 andi t4, t3, 32, flags=(EZF,)
309 or reg, reg, t4
304 srli t3, t1, 32, dataSize=8, flags=(EZF,)
305 ori t4, reg, 32
306 mov reg, reg, t4, flags=(nCEZF,)
310 mov t1, t1, t3, flags=(nCEZF,)
311
312 # Bit 5
307 mov t1, t1, t3, flags=(nCEZF,)
308
309 # Bit 5
313 srli t3, t1, 16, dataSize=8
314 andi t4, t3, 16, flags=(EZF,)
315 or reg, reg, t4
310 srli t3, t1, 16, dataSize=8, flags=(EZF,)
311 ori t4, reg, 16
312 mov reg, reg, t4, flags=(nCEZF,)
316 mov t1, t1, t3, flags=(nCEZF,)
317
318 # Bit 4
313 mov t1, t1, t3, flags=(nCEZF,)
314
315 # Bit 4
319 srli t3, t1, 8, dataSize=8
320 andi t4, t3, 8, flags=(EZF,)
321 or reg, reg, t4
316 srli t3, t1, 8, dataSize=8, flags=(EZF,)
317 ori t4, reg, 8
318 mov reg, reg, t4, flags=(nCEZF,)
322 mov t1, t1, t3, flags=(nCEZF,)
323
324 # Bit 3
319 mov t1, t1, t3, flags=(nCEZF,)
320
321 # Bit 3
325 srli t3, t1, 4, dataSize=8
326 andi t4, t3, 4, flags=(EZF,)
327 or reg, reg, t4
322 srli t3, t1, 4, dataSize=8, flags=(EZF,)
323 ori t4, reg, 4
324 mov reg, reg, t4, flags=(nCEZF,)
328 mov t1, t1, t3, flags=(nCEZF,)
329
330 # Bit 2
325 mov t1, t1, t3, flags=(nCEZF,)
326
327 # Bit 2
331 srli t3, t1, 2, dataSize=8
332 andi t4, t3, 2, flags=(EZF,)
333 or reg, reg, t4
328 srli t3, t1, 2, dataSize=8, flags=(EZF,)
329 ori t4, reg, 2
330 mov reg, reg, t4, flags=(nCEZF,)
334 mov t1, t1, t3, flags=(nCEZF,)
335
336 # Bit 1
331 mov t1, t1, t3, flags=(nCEZF,)
332
333 # Bit 1
337 srli t3, t1, 1, dataSize=8
338 andi t4, t3, 1, flags=(EZF,)
339 or reg, reg, t4
334 srli t3, t1, 1, dataSize=8, flags=(EZF,)
335 ori t4, reg, 1
336 mov reg, reg, t4, flags=(nCEZF,)
340 mov t1, t1, t3, flags=(nCEZF,)
341
342end:
343 fault "NoFault"
344};
345
346def macroop BSF_R_P {
347

--- 7 unchanged lines hidden (view full) ---

355
356 # Zero out the result register
357 mov reg, reg, t0
358
359 subi t2, t1, 1
360 xor t1, t2, t1
361
362 # Bit 6
337 mov t1, t1, t3, flags=(nCEZF,)
338
339end:
340 fault "NoFault"
341};
342
343def macroop BSF_R_P {
344

--- 7 unchanged lines hidden (view full) ---

352
353 # Zero out the result register
354 mov reg, reg, t0
355
356 subi t2, t1, 1
357 xor t1, t2, t1
358
359 # Bit 6
363 srli t3, t1, 32, dataSize=8
364 andi t4, t3, 32, flags=(EZF,)
365 or reg, reg, t4
360 srli t3, t1, 32, dataSize=8, flags=(EZF,)
361 ori t4, reg, 32
362 mov reg, reg, t4, flags=(nCEZF,)
366 mov t1, t1, t3, flags=(nCEZF,)
367
368 # Bit 5
363 mov t1, t1, t3, flags=(nCEZF,)
364
365 # Bit 5
369 srli t3, t1, 16, dataSize=8
370 andi t4, t3, 16, flags=(EZF,)
371 or reg, reg, t4
366 srli t3, t1, 16, dataSize=8, flags=(EZF,)
367 ori t4, reg, 16
368 mov reg, reg, t4, flags=(nCEZF,)
372 mov t1, t1, t3, flags=(nCEZF,)
373
374 # Bit 4
369 mov t1, t1, t3, flags=(nCEZF,)
370
371 # Bit 4
375 srli t3, t1, 8, dataSize=8
376 andi t4, t3, 8, flags=(EZF,)
377 or reg, reg, t4
372 srli t3, t1, 8, dataSize=8, flags=(EZF,)
373 ori t4, reg, 8
374 mov reg, reg, t4, flags=(nCEZF,)
378 mov t1, t1, t3, flags=(nCEZF,)
379
380 # Bit 3
375 mov t1, t1, t3, flags=(nCEZF,)
376
377 # Bit 3
381 srli t3, t1, 4, dataSize=8
382 andi t4, t3, 4, flags=(EZF,)
383 or reg, reg, t4
378 srli t3, t1, 4, dataSize=8, flags=(EZF,)
379 ori t4, reg, 4
380 mov reg, reg, t4, flags=(nCEZF,)
384 mov t1, t1, t3, flags=(nCEZF,)
385
386 # Bit 2
381 mov t1, t1, t3, flags=(nCEZF,)
382
383 # Bit 2
387 srli t3, t1, 2, dataSize=8
388 andi t4, t3, 2, flags=(EZF,)
389 or reg, reg, t4
384 srli t3, t1, 2, dataSize=8, flags=(EZF,)
385 ori t4, reg, 2
386 mov reg, reg, t4, flags=(nCEZF,)
390 mov t1, t1, t3, flags=(nCEZF,)
391
392 # Bit 1
387 mov t1, t1, t3, flags=(nCEZF,)
388
389 # Bit 1
393 srli t3, t1, 1, dataSize=8
394 andi t4, t3, 1, flags=(EZF,)
395 or reg, reg, t4
390 srli t3, t1, 1, dataSize=8, flags=(EZF,)
391 ori t4, reg, 1
392 mov reg, reg, t4, flags=(nCEZF,)
396 mov t1, t1, t3, flags=(nCEZF,)
397
398end:
399 fault "NoFault"
400};
401'''
393 mov t1, t1, t3, flags=(nCEZF,)
394
395end:
396 fault "NoFault"
397};
398'''