1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Gabe Black 28 29# Copyright (c) 2007-2008 The Hewlett-Packard Development Company 30# All rights reserved. 31# 32# Redistribution and use of this software in source and binary forms, 33# with or without modification, are permitted provided that the 34# following conditions are met: 35# 36# The software must be used only for Non-Commercial Use which means any 37# use which is NOT directed to receiving any direct monetary 38# compensation for, or commercial advantage from such use. Illustrative 39# examples of non-commercial use are academic research, personal study, 40# teaching, education and corporate research & development. 41# Illustrative examples of commercial use are distributing products for 42# commercial advantage and providing services using the software for 43# commercial advantage. 44# 45# If you wish to use this software or functionality therein that may be 46# covered by patents for commercial use, please contact: 47# Director of Intellectual Property Licensing 48# Office of Strategy and Technology 49# Hewlett-Packard Company 50# 1501 Page Mill Road 51# Palo Alto, California 94304 52# 53# Redistributions of source code must retain the above copyright notice, 54# this list of conditions and the following disclaimer. Redistributions 55# in binary form must reproduce the above copyright notice, this list of 56# conditions and the following disclaimer in the documentation and/or 57# other materials provided with the distribution. Neither the name of 58# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 59# contributors may be used to endorse or promote products derived from 60# this software without specific prior written permission. No right of 61# sublicense is granted herewith. Derivatives of the software and 62# output created using the software may be prepared, but only for 63# Non-Commercial Uses. Derivatives of the software may be shared with 64# others provided: (i) the others agree to abide by the list of 65# conditions herein which includes the Non-Commercial Use restrictions; 66# and (ii) such Derivatives of the software include the above copyright 67# notice to acknowledge the contribution from this software where 68# applicable, this list of conditions and the disclaimer below. 69# 70# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 71# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 72# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 73# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 74# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 75# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 76# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 77# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 78# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 79# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 80# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 81# 82# Authors: Gabe Black 83 84microcode = ''' 85def macroop BSR_R_R { 86 # Determine if the input was zero, and also move it to a temp reg. 87 movi t1, t1, t0, dataSize=8 88 and t1, regm, regm, flags=(ZF,) 89 bri t0, label("end"), flags=(CZF,) 90 91 # Zero out the result register 92 movi reg, reg, 0x0 93 94 # Bit 6 95 srli t3, t1, 32, dataSize=8, flags=(EZF,) 96 ori t4, reg, 0x20 97 mov reg, reg, t4, flags=(nCEZF,) 98 mov t1, t1, t3, flags=(nCEZF,) 99 100 # Bit 5 101 srli t3, t1, 16, dataSize=8, flags=(EZF,) 102 ori t4, reg, 0x10 103 mov reg, reg, t4, flags=(nCEZF,) 104 mov t1, t1, t3, flags=(nCEZF,) 105 106 # Bit 4 107 srli t3, t1, 8, dataSize=8, flags=(EZF,) 108 ori t4, reg, 0x8 109 mov reg, reg, t4, flags=(nCEZF,) 110 mov t1, t1, t3, flags=(nCEZF,) 111 112 # Bit 3 113 srli t3, t1, 4, dataSize=8, flags=(EZF,) 114 ori t4, reg, 0x4 115 mov reg, reg, t4, flags=(nCEZF,) 116 mov t1, t1, t3, flags=(nCEZF,) 117 118 # Bit 2 119 srli t3, t1, 2, dataSize=8, flags=(EZF,) 120 ori t4, reg, 0x2 121 mov reg, reg, t4, flags=(nCEZF,) 122 mov t1, t1, t3, flags=(nCEZF,) 123 124 # Bit 1 125 srli t3, t1, 1, dataSize=8, flags=(EZF,) 126 ori t4, reg, 0x1 127 mov reg, reg, t4, flags=(nCEZF,)
| 1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Gabe Black 28 29# Copyright (c) 2007-2008 The Hewlett-Packard Development Company 30# All rights reserved. 31# 32# Redistribution and use of this software in source and binary forms, 33# with or without modification, are permitted provided that the 34# following conditions are met: 35# 36# The software must be used only for Non-Commercial Use which means any 37# use which is NOT directed to receiving any direct monetary 38# compensation for, or commercial advantage from such use. Illustrative 39# examples of non-commercial use are academic research, personal study, 40# teaching, education and corporate research & development. 41# Illustrative examples of commercial use are distributing products for 42# commercial advantage and providing services using the software for 43# commercial advantage. 44# 45# If you wish to use this software or functionality therein that may be 46# covered by patents for commercial use, please contact: 47# Director of Intellectual Property Licensing 48# Office of Strategy and Technology 49# Hewlett-Packard Company 50# 1501 Page Mill Road 51# Palo Alto, California 94304 52# 53# Redistributions of source code must retain the above copyright notice, 54# this list of conditions and the following disclaimer. Redistributions 55# in binary form must reproduce the above copyright notice, this list of 56# conditions and the following disclaimer in the documentation and/or 57# other materials provided with the distribution. Neither the name of 58# the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 59# contributors may be used to endorse or promote products derived from 60# this software without specific prior written permission. No right of 61# sublicense is granted herewith. Derivatives of the software and 62# output created using the software may be prepared, but only for 63# Non-Commercial Uses. Derivatives of the software may be shared with 64# others provided: (i) the others agree to abide by the list of 65# conditions herein which includes the Non-Commercial Use restrictions; 66# and (ii) such Derivatives of the software include the above copyright 67# notice to acknowledge the contribution from this software where 68# applicable, this list of conditions and the disclaimer below. 69# 70# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 71# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 72# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 73# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 74# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 75# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 76# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 77# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 78# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 79# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 80# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 81# 82# Authors: Gabe Black 83 84microcode = ''' 85def macroop BSR_R_R { 86 # Determine if the input was zero, and also move it to a temp reg. 87 movi t1, t1, t0, dataSize=8 88 and t1, regm, regm, flags=(ZF,) 89 bri t0, label("end"), flags=(CZF,) 90 91 # Zero out the result register 92 movi reg, reg, 0x0 93 94 # Bit 6 95 srli t3, t1, 32, dataSize=8, flags=(EZF,) 96 ori t4, reg, 0x20 97 mov reg, reg, t4, flags=(nCEZF,) 98 mov t1, t1, t3, flags=(nCEZF,) 99 100 # Bit 5 101 srli t3, t1, 16, dataSize=8, flags=(EZF,) 102 ori t4, reg, 0x10 103 mov reg, reg, t4, flags=(nCEZF,) 104 mov t1, t1, t3, flags=(nCEZF,) 105 106 # Bit 4 107 srli t3, t1, 8, dataSize=8, flags=(EZF,) 108 ori t4, reg, 0x8 109 mov reg, reg, t4, flags=(nCEZF,) 110 mov t1, t1, t3, flags=(nCEZF,) 111 112 # Bit 3 113 srli t3, t1, 4, dataSize=8, flags=(EZF,) 114 ori t4, reg, 0x4 115 mov reg, reg, t4, flags=(nCEZF,) 116 mov t1, t1, t3, flags=(nCEZF,) 117 118 # Bit 2 119 srli t3, t1, 2, dataSize=8, flags=(EZF,) 120 ori t4, reg, 0x2 121 mov reg, reg, t4, flags=(nCEZF,) 122 mov t1, t1, t3, flags=(nCEZF,) 123 124 # Bit 1 125 srli t3, t1, 1, dataSize=8, flags=(EZF,) 126 ori t4, reg, 0x1 127 mov reg, reg, t4, flags=(nCEZF,)
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128 mov t1, t1, t3, flags=(nCEZF,)
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129 130end: 131 fault "NoFault" 132}; 133 134def macroop BSR_R_M { 135 136 movi t1, t1, t0, dataSize=8 137 ld t1, seg, sib, disp 138 139 # Determine if the input was zero, and also move it to a temp reg. 140 and t1, t1, t1, flags=(ZF,) 141 bri t0, label("end"), flags=(CZF,) 142 143 # Zero out the result register 144 movi reg, reg, 0x0 145 146 # Bit 6 147 srli t3, t1, 32, dataSize=8, flags=(EZF,) 148 ori t4, reg, 0x20 149 mov reg, reg, t4, flags=(nCEZF,) 150 mov t1, t1, t3, flags=(nCEZF,) 151 152 # Bit 5 153 srli t3, t1, 16, dataSize=8, flags=(EZF,) 154 ori t4, reg, 0x10 155 mov reg, reg, t4, flags=(nCEZF,) 156 mov t1, t1, t3, flags=(nCEZF,) 157 158 # Bit 4 159 srli t3, t1, 8, dataSize=8, flags=(EZF,) 160 ori t4, reg, 0x8 161 mov reg, reg, t4, flags=(nCEZF,) 162 mov t1, t1, t3, flags=(nCEZF,) 163 164 # Bit 3 165 srli t3, t1, 4, dataSize=8, flags=(EZF,) 166 ori t4, reg, 0x4 167 mov reg, reg, t4, flags=(nCEZF,) 168 mov t1, t1, t3, flags=(nCEZF,) 169 170 # Bit 2 171 srli t3, t1, 2, dataSize=8, flags=(EZF,) 172 ori t4, reg, 0x2 173 mov reg, reg, t4, flags=(nCEZF,) 174 mov t1, t1, t3, flags=(nCEZF,) 175 176 # Bit 1 177 srli t3, t1, 1, dataSize=8, flags=(EZF,) 178 ori t4, reg, 0x1 179 mov reg, reg, t4, flags=(nCEZF,)
| 128 129end: 130 fault "NoFault" 131}; 132 133def macroop BSR_R_M { 134 135 movi t1, t1, t0, dataSize=8 136 ld t1, seg, sib, disp 137 138 # Determine if the input was zero, and also move it to a temp reg. 139 and t1, t1, t1, flags=(ZF,) 140 bri t0, label("end"), flags=(CZF,) 141 142 # Zero out the result register 143 movi reg, reg, 0x0 144 145 # Bit 6 146 srli t3, t1, 32, dataSize=8, flags=(EZF,) 147 ori t4, reg, 0x20 148 mov reg, reg, t4, flags=(nCEZF,) 149 mov t1, t1, t3, flags=(nCEZF,) 150 151 # Bit 5 152 srli t3, t1, 16, dataSize=8, flags=(EZF,) 153 ori t4, reg, 0x10 154 mov reg, reg, t4, flags=(nCEZF,) 155 mov t1, t1, t3, flags=(nCEZF,) 156 157 # Bit 4 158 srli t3, t1, 8, dataSize=8, flags=(EZF,) 159 ori t4, reg, 0x8 160 mov reg, reg, t4, flags=(nCEZF,) 161 mov t1, t1, t3, flags=(nCEZF,) 162 163 # Bit 3 164 srli t3, t1, 4, dataSize=8, flags=(EZF,) 165 ori t4, reg, 0x4 166 mov reg, reg, t4, flags=(nCEZF,) 167 mov t1, t1, t3, flags=(nCEZF,) 168 169 # Bit 2 170 srli t3, t1, 2, dataSize=8, flags=(EZF,) 171 ori t4, reg, 0x2 172 mov reg, reg, t4, flags=(nCEZF,) 173 mov t1, t1, t3, flags=(nCEZF,) 174 175 # Bit 1 176 srli t3, t1, 1, dataSize=8, flags=(EZF,) 177 ori t4, reg, 0x1 178 mov reg, reg, t4, flags=(nCEZF,)
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180 mov t1, t1, t3, flags=(nCEZF,)
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181 182end: 183 fault "NoFault" 184}; 185 186def macroop BSR_R_P { 187 188 rdip t7 189 movi t1, t1, t0, dataSize=8 190 ld t1, seg, riprel, disp 191 192 # Determine if the input was zero, and also move it to a temp reg. 193 and t1, t1, t1, flags=(ZF,) 194 bri t0, label("end"), flags=(CZF,) 195 196 # Zero out the result register 197 movi reg, reg, 0x0 198 199 # Bit 6 200 srli t3, t1, 32, dataSize=8, flags=(EZF,) 201 ori t4, reg, 0x20 202 mov reg, reg, t4, flags=(nCEZF,) 203 mov t1, t1, t3, flags=(nCEZF,) 204 205 # Bit 5 206 srli t3, t1, 16, dataSize=8, flags=(EZF,) 207 ori t4, reg, 0x10 208 mov reg, reg, t4, flags=(nCEZF,) 209 mov t1, t1, t3, flags=(nCEZF,) 210 211 # Bit 4 212 srli t3, t1, 8, dataSize=8, flags=(EZF,) 213 ori t4, reg, 0x8 214 mov reg, reg, t4, flags=(nCEZF,) 215 mov t1, t1, t3, flags=(nCEZF,) 216 217 # Bit 3 218 srli t3, t1, 4, dataSize=8, flags=(EZF,) 219 ori t4, reg, 0x4 220 mov reg, reg, t4, flags=(nCEZF,) 221 mov t1, t1, t3, flags=(nCEZF,) 222 223 # Bit 2 224 srli t3, t1, 2, dataSize=8, flags=(EZF,) 225 ori t4, reg, 0x2 226 mov reg, reg, t4, flags=(nCEZF,) 227 mov t1, t1, t3, flags=(nCEZF,) 228 229 # Bit 1 230 srli t3, t1, 1, dataSize=8, flags=(EZF,) 231 ori t4, reg, 0x1 232 mov reg, reg, t4, flags=(nCEZF,)
| 179 180end: 181 fault "NoFault" 182}; 183 184def macroop BSR_R_P { 185 186 rdip t7 187 movi t1, t1, t0, dataSize=8 188 ld t1, seg, riprel, disp 189 190 # Determine if the input was zero, and also move it to a temp reg. 191 and t1, t1, t1, flags=(ZF,) 192 bri t0, label("end"), flags=(CZF,) 193 194 # Zero out the result register 195 movi reg, reg, 0x0 196 197 # Bit 6 198 srli t3, t1, 32, dataSize=8, flags=(EZF,) 199 ori t4, reg, 0x20 200 mov reg, reg, t4, flags=(nCEZF,) 201 mov t1, t1, t3, flags=(nCEZF,) 202 203 # Bit 5 204 srli t3, t1, 16, dataSize=8, flags=(EZF,) 205 ori t4, reg, 0x10 206 mov reg, reg, t4, flags=(nCEZF,) 207 mov t1, t1, t3, flags=(nCEZF,) 208 209 # Bit 4 210 srli t3, t1, 8, dataSize=8, flags=(EZF,) 211 ori t4, reg, 0x8 212 mov reg, reg, t4, flags=(nCEZF,) 213 mov t1, t1, t3, flags=(nCEZF,) 214 215 # Bit 3 216 srli t3, t1, 4, dataSize=8, flags=(EZF,) 217 ori t4, reg, 0x4 218 mov reg, reg, t4, flags=(nCEZF,) 219 mov t1, t1, t3, flags=(nCEZF,) 220 221 # Bit 2 222 srli t3, t1, 2, dataSize=8, flags=(EZF,) 223 ori t4, reg, 0x2 224 mov reg, reg, t4, flags=(nCEZF,) 225 mov t1, t1, t3, flags=(nCEZF,) 226 227 # Bit 1 228 srli t3, t1, 1, dataSize=8, flags=(EZF,) 229 ori t4, reg, 0x1 230 mov reg, reg, t4, flags=(nCEZF,)
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233 mov t1, t1, t3, flags=(nCEZF,)
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234 235end: 236 fault "NoFault" 237}; 238 239def macroop BSF_R_R { 240 # Determine if the input was zero, and also move it to a temp reg. 241 mov t1, t1, t0, dataSize=8 242 and t1, regm, regm, flags=(ZF,) 243 bri t0, label("end"), flags=(CZF,) 244 245 # Zero out the result register 246 movi reg, reg, 0 247 248 subi t2, t1, 1 249 xor t1, t2, t1 250
| 231 232end: 233 fault "NoFault" 234}; 235 236def macroop BSF_R_R { 237 # Determine if the input was zero, and also move it to a temp reg. 238 mov t1, t1, t0, dataSize=8 239 and t1, regm, regm, flags=(ZF,) 240 bri t0, label("end"), flags=(CZF,) 241 242 # Zero out the result register 243 movi reg, reg, 0 244 245 subi t2, t1, 1 246 xor t1, t2, t1 247
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| 248
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251 # Bit 6
| 249 # Bit 6
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252 srli t3, t1, 32, dataSize=8 253 andi t4, t3, 32, flags=(EZF,) 254 or reg, reg, t4
| 250 srli t3, t1, 32, dataSize=8, flags=(EZF,) 251 ori t4, reg, 32 252 mov reg, reg, t4, flags=(nCEZF,)
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255 mov t1, t1, t3, flags=(nCEZF,) 256 257 # Bit 5
| 253 mov t1, t1, t3, flags=(nCEZF,) 254 255 # Bit 5
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258 srli t3, t1, 16, dataSize=8 259 andi t4, t3, 16, flags=(EZF,) 260 or reg, reg, t4
| 256 srli t3, t1, 16, dataSize=8, flags=(EZF,) 257 ori t4, reg, 16 258 mov reg, reg, t4, flags=(nCEZF,)
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261 mov t1, t1, t3, flags=(nCEZF,) 262 263 # Bit 4
| 259 mov t1, t1, t3, flags=(nCEZF,) 260 261 # Bit 4
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264 srli t3, t1, 8, dataSize=8 265 andi t4, t3, 8, flags=(EZF,) 266 or reg, reg, t4
| 262 srli t3, t1, 8, dataSize=8, flags=(EZF,) 263 ori t4, reg, 8 264 mov reg, reg, t4, flags=(nCEZF,)
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267 mov t1, t1, t3, flags=(nCEZF,) 268 269 # Bit 3
| 265 mov t1, t1, t3, flags=(nCEZF,) 266 267 # Bit 3
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270 srli t3, t1, 4, dataSize=8 271 andi t4, t3, 4, flags=(EZF,) 272 or reg, reg, t4
| 268 srli t3, t1, 4, dataSize=8, flags=(EZF,) 269 ori t4, reg, 4 270 mov reg, reg, t4, flags=(nCEZF,)
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273 mov t1, t1, t3, flags=(nCEZF,) 274 275 # Bit 2
| 271 mov t1, t1, t3, flags=(nCEZF,) 272 273 # Bit 2
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276 srli t3, t1, 2, dataSize=8 277 andi t4, t3, 2, flags=(EZF,) 278 or reg, reg, t4
| 274 srli t3, t1, 2, dataSize=8, flags=(EZF,) 275 ori t4, reg, 2 276 mov reg, reg, t4, flags=(nCEZF,)
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279 mov t1, t1, t3, flags=(nCEZF,) 280 281 # Bit 1
| 277 mov t1, t1, t3, flags=(nCEZF,) 278 279 # Bit 1
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282 srli t3, t1, 1, dataSize=8 283 andi t4, t3, 1, flags=(EZF,) 284 or reg, reg, t4 285 mov t1, t1, t3, flags=(nCEZF,)
| 280 srli t3, t1, 1, dataSize=8, flags=(EZF,) 281 ori t4, reg, 1 282 mov reg, reg, t4, flags=(nCEZF,)
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286 287end: 288 fault "NoFault" 289}; 290 291def macroop BSF_R_M { 292 293 mov t1, t1, t0, dataSize=8 294 ld t1, seg, sib, disp 295 296 # Determine if the input was zero, and also move it to a temp reg. 297 and t1, t1, t1, flags=(ZF,) 298 bri t0, label("end"), flags=(CZF,) 299 300 # Zero out the result register 301 mov reg, reg, t0 302 303 subi t2, t1, 1 304 xor t1, t2, t1 305 306 # Bit 6
| 283 284end: 285 fault "NoFault" 286}; 287 288def macroop BSF_R_M { 289 290 mov t1, t1, t0, dataSize=8 291 ld t1, seg, sib, disp 292 293 # Determine if the input was zero, and also move it to a temp reg. 294 and t1, t1, t1, flags=(ZF,) 295 bri t0, label("end"), flags=(CZF,) 296 297 # Zero out the result register 298 mov reg, reg, t0 299 300 subi t2, t1, 1 301 xor t1, t2, t1 302 303 # Bit 6
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307 srli t3, t1, 32, dataSize=8 308 andi t4, t3, 32, flags=(EZF,) 309 or reg, reg, t4
| 304 srli t3, t1, 32, dataSize=8, flags=(EZF,) 305 ori t4, reg, 32 306 mov reg, reg, t4, flags=(nCEZF,)
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310 mov t1, t1, t3, flags=(nCEZF,) 311 312 # Bit 5
| 307 mov t1, t1, t3, flags=(nCEZF,) 308 309 # Bit 5
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313 srli t3, t1, 16, dataSize=8 314 andi t4, t3, 16, flags=(EZF,) 315 or reg, reg, t4
| 310 srli t3, t1, 16, dataSize=8, flags=(EZF,) 311 ori t4, reg, 16 312 mov reg, reg, t4, flags=(nCEZF,)
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316 mov t1, t1, t3, flags=(nCEZF,) 317 318 # Bit 4
| 313 mov t1, t1, t3, flags=(nCEZF,) 314 315 # Bit 4
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319 srli t3, t1, 8, dataSize=8 320 andi t4, t3, 8, flags=(EZF,) 321 or reg, reg, t4
| 316 srli t3, t1, 8, dataSize=8, flags=(EZF,) 317 ori t4, reg, 8 318 mov reg, reg, t4, flags=(nCEZF,)
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322 mov t1, t1, t3, flags=(nCEZF,) 323 324 # Bit 3
| 319 mov t1, t1, t3, flags=(nCEZF,) 320 321 # Bit 3
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325 srli t3, t1, 4, dataSize=8 326 andi t4, t3, 4, flags=(EZF,) 327 or reg, reg, t4
| 322 srli t3, t1, 4, dataSize=8, flags=(EZF,) 323 ori t4, reg, 4 324 mov reg, reg, t4, flags=(nCEZF,)
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328 mov t1, t1, t3, flags=(nCEZF,) 329 330 # Bit 2
| 325 mov t1, t1, t3, flags=(nCEZF,) 326 327 # Bit 2
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331 srli t3, t1, 2, dataSize=8 332 andi t4, t3, 2, flags=(EZF,) 333 or reg, reg, t4
| 328 srli t3, t1, 2, dataSize=8, flags=(EZF,) 329 ori t4, reg, 2 330 mov reg, reg, t4, flags=(nCEZF,)
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334 mov t1, t1, t3, flags=(nCEZF,) 335 336 # Bit 1
| 331 mov t1, t1, t3, flags=(nCEZF,) 332 333 # Bit 1
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337 srli t3, t1, 1, dataSize=8 338 andi t4, t3, 1, flags=(EZF,) 339 or reg, reg, t4
| 334 srli t3, t1, 1, dataSize=8, flags=(EZF,) 335 ori t4, reg, 1 336 mov reg, reg, t4, flags=(nCEZF,)
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340 mov t1, t1, t3, flags=(nCEZF,) 341 342end: 343 fault "NoFault" 344}; 345 346def macroop BSF_R_P { 347 348 rdip t7 349 mov t1, t1, t0, dataSize=8 350 ld t1, seg, riprel, disp 351 352 # Determine if the input was zero, and also move it to a temp reg. 353 and t1, t1, t1, flags=(ZF,) 354 bri t0, label("end"), flags=(CZF,) 355 356 # Zero out the result register 357 mov reg, reg, t0 358 359 subi t2, t1, 1 360 xor t1, t2, t1 361 362 # Bit 6
| 337 mov t1, t1, t3, flags=(nCEZF,) 338 339end: 340 fault "NoFault" 341}; 342 343def macroop BSF_R_P { 344 345 rdip t7 346 mov t1, t1, t0, dataSize=8 347 ld t1, seg, riprel, disp 348 349 # Determine if the input was zero, and also move it to a temp reg. 350 and t1, t1, t1, flags=(ZF,) 351 bri t0, label("end"), flags=(CZF,) 352 353 # Zero out the result register 354 mov reg, reg, t0 355 356 subi t2, t1, 1 357 xor t1, t2, t1 358 359 # Bit 6
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363 srli t3, t1, 32, dataSize=8 364 andi t4, t3, 32, flags=(EZF,) 365 or reg, reg, t4
| 360 srli t3, t1, 32, dataSize=8, flags=(EZF,) 361 ori t4, reg, 32 362 mov reg, reg, t4, flags=(nCEZF,)
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366 mov t1, t1, t3, flags=(nCEZF,) 367 368 # Bit 5
| 363 mov t1, t1, t3, flags=(nCEZF,) 364 365 # Bit 5
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369 srli t3, t1, 16, dataSize=8 370 andi t4, t3, 16, flags=(EZF,) 371 or reg, reg, t4
| 366 srli t3, t1, 16, dataSize=8, flags=(EZF,) 367 ori t4, reg, 16 368 mov reg, reg, t4, flags=(nCEZF,)
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372 mov t1, t1, t3, flags=(nCEZF,) 373 374 # Bit 4
| 369 mov t1, t1, t3, flags=(nCEZF,) 370 371 # Bit 4
|
375 srli t3, t1, 8, dataSize=8 376 andi t4, t3, 8, flags=(EZF,) 377 or reg, reg, t4
| 372 srli t3, t1, 8, dataSize=8, flags=(EZF,) 373 ori t4, reg, 8 374 mov reg, reg, t4, flags=(nCEZF,)
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378 mov t1, t1, t3, flags=(nCEZF,) 379 380 # Bit 3
| 375 mov t1, t1, t3, flags=(nCEZF,) 376 377 # Bit 3
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381 srli t3, t1, 4, dataSize=8 382 andi t4, t3, 4, flags=(EZF,) 383 or reg, reg, t4
| 378 srli t3, t1, 4, dataSize=8, flags=(EZF,) 379 ori t4, reg, 4 380 mov reg, reg, t4, flags=(nCEZF,)
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384 mov t1, t1, t3, flags=(nCEZF,) 385 386 # Bit 2
| 381 mov t1, t1, t3, flags=(nCEZF,) 382 383 # Bit 2
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387 srli t3, t1, 2, dataSize=8 388 andi t4, t3, 2, flags=(EZF,) 389 or reg, reg, t4
| 384 srli t3, t1, 2, dataSize=8, flags=(EZF,) 385 ori t4, reg, 2 386 mov reg, reg, t4, flags=(nCEZF,)
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390 mov t1, t1, t3, flags=(nCEZF,) 391 392 # Bit 1
| 387 mov t1, t1, t3, flags=(nCEZF,) 388 389 # Bit 1
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393 srli t3, t1, 1, dataSize=8 394 andi t4, t3, 1, flags=(EZF,) 395 or reg, reg, t4
| 390 srli t3, t1, 1, dataSize=8, flags=(EZF,) 391 ori t4, reg, 1 392 mov reg, reg, t4, flags=(nCEZF,)
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396 mov t1, t1, t3, flags=(nCEZF,) 397 398end: 399 fault "NoFault" 400}; 401'''
| 393 mov t1, t1, t3, flags=(nCEZF,) 394 395end: 396 fault "NoFault" 397}; 398'''
|