bit_scan.py (5423:536fb3cc5a9b) | bit_scan.py (5661:443e6f925027) |
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1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 72 unchanged lines hidden (view full) --- 81# 82# Authors: Gabe Black 83 84microcode = ''' 85def macroop BSR_R_R { 86 # Determine if the input was zero, and also move it to a temp reg. 87 movi t1, t1, t0, dataSize=8 88 and t1, regm, regm, flags=(ZF,) | 1# Copyright (c) 2008 The Regents of The University of Michigan 2# All rights reserved. 3# 4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright --- 72 unchanged lines hidden (view full) --- 81# 82# Authors: Gabe Black 83 84microcode = ''' 85def macroop BSR_R_R { 86 # Determine if the input was zero, and also move it to a temp reg. 87 movi t1, t1, t0, dataSize=8 88 and t1, regm, regm, flags=(ZF,) |
89 bri t0, label("end"), flags=(CZF,) | 89 br label("end"), flags=(CZF,) |
90 91 # Zero out the result register 92 movi reg, reg, 0x0 93 94 # Bit 6 95 srli t3, t1, 32, dataSize=8, flags=(EZF,) 96 ori t4, reg, 0x20 97 mov reg, reg, t4, flags=(nCEZF,) --- 34 unchanged lines hidden (view full) --- 132 133def macroop BSR_R_M { 134 135 movi t1, t1, t0, dataSize=8 136 ld t1, seg, sib, disp 137 138 # Determine if the input was zero, and also move it to a temp reg. 139 and t1, t1, t1, flags=(ZF,) | 90 91 # Zero out the result register 92 movi reg, reg, 0x0 93 94 # Bit 6 95 srli t3, t1, 32, dataSize=8, flags=(EZF,) 96 ori t4, reg, 0x20 97 mov reg, reg, t4, flags=(nCEZF,) --- 34 unchanged lines hidden (view full) --- 132 133def macroop BSR_R_M { 134 135 movi t1, t1, t0, dataSize=8 136 ld t1, seg, sib, disp 137 138 # Determine if the input was zero, and also move it to a temp reg. 139 and t1, t1, t1, flags=(ZF,) |
140 bri t0, label("end"), flags=(CZF,) | 140 br label("end"), flags=(CZF,) |
141 142 # Zero out the result register 143 movi reg, reg, 0x0 144 145 # Bit 6 146 srli t3, t1, 32, dataSize=8, flags=(EZF,) 147 ori t4, reg, 0x20 148 mov reg, reg, t4, flags=(nCEZF,) --- 35 unchanged lines hidden (view full) --- 184def macroop BSR_R_P { 185 186 rdip t7 187 movi t1, t1, t0, dataSize=8 188 ld t1, seg, riprel, disp 189 190 # Determine if the input was zero, and also move it to a temp reg. 191 and t1, t1, t1, flags=(ZF,) | 141 142 # Zero out the result register 143 movi reg, reg, 0x0 144 145 # Bit 6 146 srli t3, t1, 32, dataSize=8, flags=(EZF,) 147 ori t4, reg, 0x20 148 mov reg, reg, t4, flags=(nCEZF,) --- 35 unchanged lines hidden (view full) --- 184def macroop BSR_R_P { 185 186 rdip t7 187 movi t1, t1, t0, dataSize=8 188 ld t1, seg, riprel, disp 189 190 # Determine if the input was zero, and also move it to a temp reg. 191 and t1, t1, t1, flags=(ZF,) |
192 bri t0, label("end"), flags=(CZF,) | 192 br label("end"), flags=(CZF,) |
193 194 # Zero out the result register 195 movi reg, reg, 0x0 196 197 # Bit 6 198 srli t3, t1, 32, dataSize=8, flags=(EZF,) 199 ori t4, reg, 0x20 200 mov reg, reg, t4, flags=(nCEZF,) --- 31 unchanged lines hidden (view full) --- 232end: 233 fault "NoFault" 234}; 235 236def macroop BSF_R_R { 237 # Determine if the input was zero, and also move it to a temp reg. 238 mov t1, t1, t0, dataSize=8 239 and t1, regm, regm, flags=(ZF,) | 193 194 # Zero out the result register 195 movi reg, reg, 0x0 196 197 # Bit 6 198 srli t3, t1, 32, dataSize=8, flags=(EZF,) 199 ori t4, reg, 0x20 200 mov reg, reg, t4, flags=(nCEZF,) --- 31 unchanged lines hidden (view full) --- 232end: 233 fault "NoFault" 234}; 235 236def macroop BSF_R_R { 237 # Determine if the input was zero, and also move it to a temp reg. 238 mov t1, t1, t0, dataSize=8 239 and t1, regm, regm, flags=(ZF,) |
240 bri t0, label("end"), flags=(CZF,) | 240 br label("end"), flags=(CZF,) |
241 242 # Zero out the result register 243 movi reg, reg, 0 244 245 subi t2, t1, 1 246 xor t1, t2, t1 247 248 --- 38 unchanged lines hidden (view full) --- 287 288def macroop BSF_R_M { 289 290 mov t1, t1, t0, dataSize=8 291 ld t1, seg, sib, disp 292 293 # Determine if the input was zero, and also move it to a temp reg. 294 and t1, t1, t1, flags=(ZF,) | 241 242 # Zero out the result register 243 movi reg, reg, 0 244 245 subi t2, t1, 1 246 xor t1, t2, t1 247 248 --- 38 unchanged lines hidden (view full) --- 287 288def macroop BSF_R_M { 289 290 mov t1, t1, t0, dataSize=8 291 ld t1, seg, sib, disp 292 293 # Determine if the input was zero, and also move it to a temp reg. 294 and t1, t1, t1, flags=(ZF,) |
295 bri t0, label("end"), flags=(CZF,) | 295 br label("end"), flags=(CZF,) |
296 297 # Zero out the result register 298 mov reg, reg, t0 299 300 subi t2, t1, 1 301 xor t1, t2, t1 302 303 # Bit 6 --- 39 unchanged lines hidden (view full) --- 343def macroop BSF_R_P { 344 345 rdip t7 346 mov t1, t1, t0, dataSize=8 347 ld t1, seg, riprel, disp 348 349 # Determine if the input was zero, and also move it to a temp reg. 350 and t1, t1, t1, flags=(ZF,) | 296 297 # Zero out the result register 298 mov reg, reg, t0 299 300 subi t2, t1, 1 301 xor t1, t2, t1 302 303 # Bit 6 --- 39 unchanged lines hidden (view full) --- 343def macroop BSF_R_P { 344 345 rdip t7 346 mov t1, t1, t0, dataSize=8 347 ld t1, seg, riprel, disp 348 349 # Determine if the input was zero, and also move it to a temp reg. 350 and t1, t1, t1, flags=(ZF,) |
351 bri t0, label("end"), flags=(CZF,) | 351 br label("end"), flags=(CZF,) |
352 353 # Zero out the result register 354 mov reg, reg, t0 355 356 subi t2, t1, 1 357 xor t1, t2, t1 358 359 # Bit 6 --- 39 unchanged lines hidden --- | 352 353 # Zero out the result register 354 mov reg, reg, t0 355 356 subi t2, t1, 1 357 xor t1, t2, t1 358 359 # Bit 6 --- 39 unchanged lines hidden --- |