bit_scan.py (5081:2ccce8600a9d) | bit_scan.py (5332:0e25e0b6982c) |
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1# Copyright (c) 2007 The Hewlett-Packard Development Company | 1# Copyright (c) 2008 The Regents of The University of Michigan |
2# All rights reserved. 3# | 2# All rights reserved. 3# |
4# Redistribution and use in source and binary forms, with or without 5# modification, are permitted provided that the following conditions are 6# met: redistributions of source code must retain the above copyright 7# notice, this list of conditions and the following disclaimer; 8# redistributions in binary form must reproduce the above copyright 9# notice, this list of conditions and the following disclaimer in the 10# documentation and/or other materials provided with the distribution; 11# neither the name of the copyright holders nor the names of its 12# contributors may be used to endorse or promote products derived from 13# this software without specific prior written permission. 14# 15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26# 27# Authors: Gabe Black 28 29# Copyright (c) 2007-2008 The Hewlett-Packard Development Company 30# All rights reserved. 31# |
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4# Redistribution and use of this software in source and binary forms, 5# with or without modification, are permitted provided that the 6# following conditions are met: 7# 8# The software must be used only for Non-Commercial Use which means any 9# use which is NOT directed to receiving any direct monetary 10# compensation for, or commercial advantage from such use. Illustrative 11# examples of non-commercial use are academic research, personal study, --- 36 unchanged lines hidden (view full) --- 48# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 49# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 50# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 51# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 52# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 53# 54# Authors: Gabe Black 55 | 32# Redistribution and use of this software in source and binary forms, 33# with or without modification, are permitted provided that the 34# following conditions are met: 35# 36# The software must be used only for Non-Commercial Use which means any 37# use which is NOT directed to receiving any direct monetary 38# compensation for, or commercial advantage from such use. Illustrative 39# examples of non-commercial use are academic research, personal study, --- 36 unchanged lines hidden (view full) --- 76# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 77# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 78# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 79# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 80# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 81# 82# Authors: Gabe Black 83 |
56microcode = "" 57#let {{ 58# class BSF(Inst): 59# "GenFault ${new UnimpInstFault}" 60# class BSR(Inst): 61# "GenFault ${new UnimpInstFault}" 62#}}; | 84microcode = ''' 85def macroop BSF_R_R { 86 # Determine if the input was zero, and also move it to a temp reg. 87 and t1, regm, regm, flags=(ZF,) 88 bri t0, label("end"), flags=(CZF,) 89 90 # Zero out the result register 91 movi reg, reg, 0x0 92 93 # Bit 6 94 limm t2, 0xFFFFFFFF00000000 95 and t3, t2, t1, flags=(EZF,) 96 ori t4, reg, 0x20 97 mov reg, reg, t4, flags=(nCEZF,) 98 mov t1, t1, t3, flags=(nCEZF,) 99 100 # Bit 5 101 limm t2, 0xFFFF0000FFFF0000 102 and t3, t2, t1, flags=(EZF,) 103 ori t4, reg, 0x10 104 mov reg, reg, t4, flags=(nCEZF,) 105 mov t1, t1, t3, flags=(nCEZF,) 106 107 # Bit 4 108 limm t2, 0xFF00FF00FF00FF00 109 and t3, t2, t1, flags=(EZF,) 110 ori t4, reg, 0x8 111 mov reg, reg, t4, flags=(nCEZF,) 112 mov t1, t1, t3, flags=(nCEZF,) 113 114 # Bit 3 115 limm t2, 0xF0F0F0F0F0F0F0F0 116 and t3, t2, t1, flags=(EZF,) 117 ori t4, reg, 0x4 118 mov reg, reg, t4, flags=(nCEZF,) 119 mov t1, t1, t3, flags=(nCEZF,) 120 121 # Bit 2 122 limm t2, 0xCCCCCCCCCCCCCCCC 123 and t3, t2, t1, flags=(EZF,) 124 ori t4, reg, 0x2 125 mov reg, reg, t4, flags=(nCEZF,) 126 mov t1, t1, t3, flags=(nCEZF,) 127 128 # Bit 1 129 limm t2, 0xAAAAAAAAAAAAAAAA 130 and t3, t2, t1, flags=(EZF,) 131 ori t4, reg, 0x1 132 mov reg, reg, t4, flags=(nCEZF,) 133 mov t1, t1, t3, flags=(nCEZF,) 134 135end: 136 fault "NoFault" 137}; 138 139def macroop BSF_R_M { 140 141 ld t1, seg, sib, disp 142 143 # Determine if the input was zero, and also move it to a temp reg. 144 and t1, t1, t1, flags=(ZF,) 145 bri t0, label("end"), flags=(CZF,) 146 147 # Zero out the result register 148 movi reg, reg, 0x0 149 150 # Bit 6 151 limm t2, 0xFFFFFFFF00000000 152 and t3, t2, t1, flags=(EZF,) 153 ori t4, reg, 0x20 154 mov reg, reg, t4, flags=(nCEZF,) 155 mov t1, t1, t3, flags=(nCEZF,) 156 157 # Bit 5 158 limm t2, 0xFFFF0000FFFF0000 159 and t3, t2, t1, flags=(EZF,) 160 ori t4, reg, 0x10 161 mov reg, reg, t4, flags=(nCEZF,) 162 mov t1, t1, t3, flags=(nCEZF,) 163 164 # Bit 4 165 limm t2, 0xFF00FF00FF00FF00 166 and t3, t2, t1, flags=(EZF,) 167 ori t4, reg, 0x8 168 mov reg, reg, t4, flags=(nCEZF,) 169 mov t1, t1, t3, flags=(nCEZF,) 170 171 # Bit 3 172 limm t2, 0xF0F0F0F0F0F0F0F0 173 and t3, t2, t1, flags=(EZF,) 174 ori t4, reg, 0x4 175 mov reg, reg, t4, flags=(nCEZF,) 176 mov t1, t1, t3, flags=(nCEZF,) 177 178 # Bit 2 179 limm t2, 0xCCCCCCCCCCCCCCCC 180 and t3, t2, t1, flags=(EZF,) 181 ori t4, reg, 0x2 182 mov reg, reg, t4, flags=(nCEZF,) 183 mov t1, t1, t3, flags=(nCEZF,) 184 185 # Bit 1 186 limm t2, 0xAAAAAAAAAAAAAAAA 187 and t3, t2, t1, flags=(EZF,) 188 ori t4, reg, 0x1 189 mov reg, reg, t4, flags=(nCEZF,) 190 mov t1, t1, t3, flags=(nCEZF,) 191 192end: 193 fault "NoFault" 194}; 195 196def macroop BSF_R_P { 197 198 rdip t7 199 ld t1, seg, riprel, disp 200 201 # Determine if the input was zero, and also move it to a temp reg. 202 and t1, t1, t1, flags=(ZF,) 203 bri t0, label("end"), flags=(CZF,) 204 205 # Zero out the result register 206 movi reg, reg, 0x0 207 208 # Bit 6 209 limm t2, 0xFFFFFFFF00000000 210 and t3, t2, t1, flags=(EZF,) 211 ori t4, reg, 0x20 212 mov reg, reg, t4, flags=(nCEZF,) 213 mov t1, t1, t3, flags=(nCEZF,) 214 215 # Bit 5 216 limm t2, 0xFFFF0000FFFF0000 217 and t3, t2, t1, flags=(EZF,) 218 ori t4, reg, 0x10 219 mov reg, reg, t4, flags=(nCEZF,) 220 mov t1, t1, t3, flags=(nCEZF,) 221 222 # Bit 4 223 limm t2, 0xFF00FF00FF00FF00 224 and t3, t2, t1, flags=(EZF,) 225 ori t4, reg, 0x8 226 mov reg, reg, t4, flags=(nCEZF,) 227 mov t1, t1, t3, flags=(nCEZF,) 228 229 # Bit 3 230 limm t2, 0xF0F0F0F0F0F0F0F0 231 and t3, t2, t1, flags=(EZF,) 232 ori t4, reg, 0x4 233 mov reg, reg, t4, flags=(nCEZF,) 234 mov t1, t1, t3, flags=(nCEZF,) 235 236 # Bit 2 237 limm t2, 0xCCCCCCCCCCCCCCCC 238 and t3, t2, t1, flags=(EZF,) 239 ori t4, reg, 0x2 240 mov reg, reg, t4, flags=(nCEZF,) 241 mov t1, t1, t3, flags=(nCEZF,) 242 243 # Bit 1 244 limm t2, 0xAAAAAAAAAAAAAAAA 245 and t3, t2, t1, flags=(EZF,) 246 ori t4, reg, 0x1 247 mov reg, reg, t4, flags=(nCEZF,) 248 mov t1, t1, t3, flags=(nCEZF,) 249 250end: 251 fault "NoFault" 252}; 253 254def macroop BSR_R_R { 255 # Determine if the input was zero, and also move it to a temp reg. 256 and t1, regm, regm, flags=(ZF,) 257 bri t0, label("end"), flags=(CZF,) 258 259 # Zero out the result register 260 movi reg, reg, 0 261 262 # Bit 6 263 limm t2, 0x00000000FFFFFFFF 264 and t3, t2, t1, flags=(EZF,) 265 ori t4, reg, 0x20 266 mov reg, reg, t4, flags=(CEZF,) 267 mov t1, t1, t3, flags=(nCEZF,) 268 269 # Bit 5 270 limm t2, 0x0000FFFF0000FFFF 271 and t3, t2, t1, flags=(EZF,) 272 ori t4, reg, 0x10 273 mov reg, reg, t4, flags=(CEZF,) 274 mov t1, t1, t3, flags=(nCEZF,) 275 276 # Bit 4 277 limm t2, 0x00FF00FF00FF00FF 278 and t3, t2, t1, flags=(EZF,) 279 ori t4, reg, 0x8 280 mov reg, reg, t4, flags=(CEZF,) 281 mov t1, t1, t3, flags=(nCEZF,) 282 283 # Bit 3 284 limm t2, 0x0F0F0F0F0F0F0F0F 285 and t3, t2, t1, flags=(EZF,) 286 ori t4, reg, 0x4 287 mov reg, reg, t4, flags=(CEZF,) 288 mov t1, t1, t3, flags=(nCEZF,) 289 290 # Bit 2 291 limm t2, 0x3333333333333333 292 and t3, t2, t1, flags=(EZF,) 293 ori t4, reg, 0x2 294 mov reg, reg, t4, flags=(CEZF,) 295 mov t1, t1, t3, flags=(nCEZF,) 296 297 # Bit 1 298 limm t2, 0x5555555555555555 299 and t3, t2, t1, flags=(EZF,) 300 ori t4, reg, 0x1 301 mov reg, reg, t4, flags=(CEZF,) 302 mov t1, t1, t3, flags=(nCEZF,) 303 304end: 305 fault "NoFault" 306}; 307 308def macroop BSR_R_M { 309 310 ld t1, seg, sib, disp 311 312 # Determine if the input was zero, and also move it to a temp reg. 313 and t1, t1, t1, flags=(ZF,) 314 bri t0, label("end"), flags=(CZF,) 315 316 # Zero out the result register 317 mov reg, reg, t0 318 319 # Bit 6 320 limm t2, 0x00000000FFFFFFFF 321 and t3, t2, t1, flags=(EZF,) 322 ori t4, reg, 0x20 323 mov reg, reg, t4, flags=(CEZF,) 324 mov t1, t1, t3, flags=(nCEZF,) 325 326 # Bit 5 327 limm t2, 0x0000FFFF0000FFFF 328 and t3, t2, t1, flags=(EZF,) 329 ori t4, reg, 0x10 330 mov reg, reg, t4, flags=(CEZF,) 331 mov t1, t1, t3, flags=(nCEZF,) 332 333 # Bit 4 334 limm t2, 0x00FF00FF00FF00FF 335 and t3, t2, t1, flags=(EZF,) 336 ori t4, reg, 0x8 337 mov reg, reg, t4, flags=(CEZF,) 338 mov t1, t1, t3, flags=(nCEZF,) 339 340 # Bit 3 341 limm t2, 0x0F0F0F0F0F0F0F0F 342 and t3, t2, t1, flags=(EZF,) 343 ori t4, reg, 0x4 344 mov reg, reg, t4, flags=(CEZF,) 345 mov t1, t1, t3, flags=(nCEZF,) 346 347 # Bit 2 348 limm t2, 0x3333333333333333 349 and t3, t2, t1, flags=(EZF,) 350 ori t4, reg, 0x2 351 mov reg, reg, t4, flags=(CEZF,) 352 mov t1, t1, t3, flags=(nCEZF,) 353 354 # Bit 1 355 limm t2, 0x5555555555555555 356 and t3, t2, t1, flags=(EZF,) 357 ori t4, reg, 0x1 358 mov reg, reg, t4, flags=(CEZF,) 359 mov t1, t1, t3, flags=(nCEZF,) 360 361end: 362 fault "NoFault" 363}; 364 365def macroop BSR_R_P { 366 367 rdip t7 368 ld t1, seg, riprel, disp 369 370 # Determine if the input was zero, and also move it to a temp reg. 371 and t1, t1, t1, flags=(ZF,) 372 bri t0, label("end"), flags=(CZF,) 373 374 # Zero out the result register 375 mov reg, reg, t0 376 377 # Bit 6 378 limm t2, 0x00000000FFFFFFFF 379 and t3, t2, t1, flags=(EZF,) 380 ori t4, reg, 0x20 381 mov reg, reg, t4, flags=(CEZF,) 382 mov t1, t1, t3, flags=(nCEZF,) 383 384 # Bit 5 385 limm t2, 0x0000FFFF0000FFFF 386 and t3, t2, t1, flags=(EZF,) 387 ori t4, reg, 0x10 388 mov reg, reg, t4, flags=(CEZF,) 389 mov t1, t1, t3, flags=(nCEZF,) 390 391 # Bit 4 392 limm t2, 0x00FF00FF00FF00FF 393 and t3, t2, t1, flags=(EZF,) 394 ori t4, reg, 0x8 395 mov reg, reg, t4, flags=(CEZF,) 396 mov t1, t1, t3, flags=(nCEZF,) 397 398 # Bit 3 399 limm t2, 0x0F0F0F0F0F0F0F0F 400 and t3, t2, t1, flags=(EZF,) 401 ori t4, reg, 0x4 402 mov reg, reg, t4, flags=(CEZF,) 403 mov t1, t1, t3, flags=(nCEZF,) 404 405 # Bit 2 406 limm t2, 0x3333333333333333 407 and t3, t2, t1, flags=(EZF,) 408 ori t4, reg, 0x2 409 mov reg, reg, t4, flags=(CEZF,) 410 mov t1, t1, t3, flags=(nCEZF,) 411 412 # Bit 1 413 limm t2, 0x5555555555555555 414 and t3, t2, t1, flags=(EZF,) 415 ori t4, reg, 0x1 416 mov reg, reg, t4, flags=(CEZF,) 417 mov t1, t1, t3, flags=(nCEZF,) 418 419end: 420 fault "NoFault" 421}; 422''' |