1# Copyright (c) 2008 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
--- 70 unchanged lines hidden (view full) ---
79# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
80# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81#
82# Authors: Gabe Black
83
84microcode = '''
85def macroop BSF_R_R {
86 # Determine if the input was zero, and also move it to a temp reg.
87 movi t1, t1, t0, dataSize=8
88 and t1, regm, regm, flags=(ZF,)
89 bri t0, label("end"), flags=(CZF,)
90
91 # Zero out the result register
92 movi reg, reg, 0x0
93
94 # Bit 6
95 srli t3, t1, 32, dataSize=8, flags=(EZF,)
96 ori t4, reg, 0x20
97 mov reg, reg, t4, flags=(nCEZF,)
98 mov t1, t1, t3, flags=(nCEZF,)
99
100 # Bit 5
101 srli t3, t1, 16, dataSize=8, flags=(EZF,)
102 ori t4, reg, 0x10
103 mov reg, reg, t4, flags=(nCEZF,)
104 mov t1, t1, t3, flags=(nCEZF,)
105
106 # Bit 4
107 srli t3, t1, 8, dataSize=8, flags=(EZF,)
108 ori t4, reg, 0x8
109 mov reg, reg, t4, flags=(nCEZF,)
110 mov t1, t1, t3, flags=(nCEZF,)
111
112 # Bit 3
113 srli t3, t1, 4, dataSize=8, flags=(EZF,)
114 ori t4, reg, 0x4
115 mov reg, reg, t4, flags=(nCEZF,)
116 mov t1, t1, t3, flags=(nCEZF,)
117
118 # Bit 2
119 srli t3, t1, 2, dataSize=8, flags=(EZF,)
120 ori t4, reg, 0x2
121 mov reg, reg, t4, flags=(nCEZF,)
122 mov t1, t1, t3, flags=(nCEZF,)
123
124 # Bit 1
125 srli t3, t1, 1, dataSize=8, flags=(EZF,)
126 ori t4, reg, 0x1
127 mov reg, reg, t4, flags=(nCEZF,)
128 mov t1, t1, t3, flags=(nCEZF,)
129
130end:
131 fault "NoFault"
132};
133
134def macroop BSF_R_M {
135
136 movi t1, t1, t0, dataSize=8
137 ld t1, seg, sib, disp
138
139 # Determine if the input was zero, and also move it to a temp reg.
140 and t1, t1, t1, flags=(ZF,)
141 bri t0, label("end"), flags=(CZF,)
142
143 # Zero out the result register
144 movi reg, reg, 0x0
145
146 # Bit 6
147 srli t3, t1, 32, dataSize=8, flags=(EZF,)
148 ori t4, reg, 0x20
149 mov reg, reg, t4, flags=(nCEZF,)
150 mov t1, t1, t3, flags=(nCEZF,)
151
152 # Bit 5
153 srli t3, t1, 16, dataSize=8, flags=(EZF,)
154 ori t4, reg, 0x10
155 mov reg, reg, t4, flags=(nCEZF,)
156 mov t1, t1, t3, flags=(nCEZF,)
157
158 # Bit 4
159 srli t3, t1, 8, dataSize=8, flags=(EZF,)
160 ori t4, reg, 0x8
161 mov reg, reg, t4, flags=(nCEZF,)
162 mov t1, t1, t3, flags=(nCEZF,)
163
164 # Bit 3
165 srli t3, t1, 4, dataSize=8, flags=(EZF,)
166 ori t4, reg, 0x4
167 mov reg, reg, t4, flags=(nCEZF,)
168 mov t1, t1, t3, flags=(nCEZF,)
169
170 # Bit 2
171 srli t3, t1, 2, dataSize=8, flags=(EZF,)
172 ori t4, reg, 0x2
173 mov reg, reg, t4, flags=(nCEZF,)
174 mov t1, t1, t3, flags=(nCEZF,)
175
176 # Bit 1
177 srli t3, t1, 1, dataSize=8, flags=(EZF,)
178 ori t4, reg, 0x1
179 mov reg, reg, t4, flags=(nCEZF,)
180 mov t1, t1, t3, flags=(nCEZF,)
181
182end:
183 fault "NoFault"
184};
185
186def macroop BSF_R_P {
187
188 rdip t7
189 movi t1, t1, t0, dataSize=8
190 ld t1, seg, riprel, disp
191
192 # Determine if the input was zero, and also move it to a temp reg.
193 and t1, t1, t1, flags=(ZF,)
194 bri t0, label("end"), flags=(CZF,)
195
196 # Zero out the result register
197 movi reg, reg, 0x0
198
199 # Bit 6
200 srli t3, t1, 32, dataSize=8, flags=(EZF,)
201 ori t4, reg, 0x20
202 mov reg, reg, t4, flags=(nCEZF,)
203 mov t1, t1, t3, flags=(nCEZF,)
204
205 # Bit 5
206 srli t3, t1, 16, dataSize=8, flags=(EZF,)
207 ori t4, reg, 0x10
208 mov reg, reg, t4, flags=(nCEZF,)
209 mov t1, t1, t3, flags=(nCEZF,)
210
211 # Bit 4
212 srli t3, t1, 8, dataSize=8, flags=(EZF,)
213 ori t4, reg, 0x8
214 mov reg, reg, t4, flags=(nCEZF,)
215 mov t1, t1, t3, flags=(nCEZF,)
216
217 # Bit 3
218 srli t3, t1, 4, dataSize=8, flags=(EZF,)
219 ori t4, reg, 0x4
220 mov reg, reg, t4, flags=(nCEZF,)
221 mov t1, t1, t3, flags=(nCEZF,)
222
223 # Bit 2
224 srli t3, t1, 2, dataSize=8, flags=(EZF,)
225 ori t4, reg, 0x2
226 mov reg, reg, t4, flags=(nCEZF,)
227 mov t1, t1, t3, flags=(nCEZF,)
228
229 # Bit 1
230 srli t3, t1, 1, dataSize=8, flags=(EZF,)
231 ori t4, reg, 0x1
232 mov reg, reg, t4, flags=(nCEZF,)
233 mov t1, t1, t3, flags=(nCEZF,)
234
235end:
236 fault "NoFault"
237};
238
239def macroop BSR_R_R {
240 # Determine if the input was zero, and also move it to a temp reg.
241 mov t1, t1, t0, dataSize=8
242 and t1, regm, regm, flags=(ZF,)
243 bri t0, label("end"), flags=(CZF,)
244
245 # Zero out the result register
246 movi reg, reg, 0
247
248 subi t2, t1, 1
249 xor t1, t2, t1
250
251 # Bit 6
252 srli t3, t1, 32, dataSize=8
253 andi t3, t3, 32
254 or reg, reg, t3
255
256 # Bit 5
257 srli t3, t1, 16, dataSize=8
258 andi t3, t3, 16
259 or reg, reg, t3
260
261 # Bit 4
262 srli t3, t1, 8, dataSize=8
263 andi t3, t3, 8
264 or reg, reg, t3
265
266 # Bit 3
267 srli t3, t1, 4, dataSize=8
268 andi t3, t3, 4
269 or reg, reg, t3
270
271 # Bit 2
272 srli t3, t1, 2, dataSize=8
273 andi t3, t3, 2
274 or reg, reg, t3
275
276 # Bit 1
277 srli t3, t1, 1, dataSize=8
278 andi t3, t3, 1
279 or reg, reg, t3
280
281end:
282 fault "NoFault"
283};
284
285def macroop BSR_R_M {
286
287 mov t1, t1, t0, dataSize=8
288 ld t1, seg, sib, disp
289
290 # Determine if the input was zero, and also move it to a temp reg.
291 and t1, t1, t1, flags=(ZF,)
292 bri t0, label("end"), flags=(CZF,)
293
294 # Zero out the result register
295 mov reg, reg, t0
296
297 subi t2, t1, 1
298 xor t1, t2, t1
299
300 # Bit 6
301 srli t3, t1, 32, dataSize=8
302 andi t3, t3, 32
303 or reg, reg, t3
304
305 # Bit 5
306 srli t3, t1, 16, dataSize=8
307 andi t3, t3, 16
308 or reg, reg, t3
309
310 # Bit 4
311 srli t3, t1, 8, dataSize=8
312 andi t3, t3, 8
313 or reg, reg, t3
314
315 # Bit 3
316 srli t3, t1, 4, dataSize=8
317 andi t3, t3, 4
318 or reg, reg, t3
319
320 # Bit 2
321 srli t3, t1, 2, dataSize=8
322 andi t3, t3, 2
323 or reg, reg, t3
324
325 # Bit 1
326 srli t3, t1, 1, dataSize=8
327 andi t3, t3, 1
328 or reg, reg, t3
329
330end:
331 fault "NoFault"
332};
333
334def macroop BSR_R_P {
335
336 rdip t7
337 mov t1, t1, t0, dataSize=8
338 ld t1, seg, riprel, disp
339
340 # Determine if the input was zero, and also move it to a temp reg.
341 and t1, t1, t1, flags=(ZF,)
342 bri t0, label("end"), flags=(CZF,)
343
344 # Zero out the result register
345 mov reg, reg, t0
346
347 subi t2, t1, 1
348 xor t1, t2, t1
349
350 # Bit 6
351 srli t3, t1, 32, dataSize=8
352 andi t3, t3, 32
353 or reg, reg, t3
354
355 # Bit 5
356 srli t3, t1, 16, dataSize=8
357 andi t3, t3, 16
358 or reg, reg, t3
359
360 # Bit 4
361 srli t3, t1, 8, dataSize=8
362 andi t3, t3, 8
363 or reg, reg, t3
364
365 # Bit 3
366 srli t3, t1, 4, dataSize=8
367 andi t3, t3, 4
368 or reg, reg, t3
369
370 # Bit 2
371 srli t3, t1, 2, dataSize=8
372 andi t3, t3, 2
373 or reg, reg, t3
374
375 # Bit 1
376 srli t3, t1, 1, dataSize=8
377 andi t3, t3, 1
378 or reg, reg, t3
379
380end:
381 fault "NoFault"
382};
383'''
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
--- 70 unchanged lines hidden (view full) ---
79# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
80# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
81#
82# Authors: Gabe Black
83
84microcode = '''
85def macroop BSF_R_R {
86 # Determine if the input was zero, and also move it to a temp reg.
87 movi t1, t1, t0, dataSize=8
88 and t1, regm, regm, flags=(ZF,)
89 bri t0, label("end"), flags=(CZF,)
90
91 # Zero out the result register
92 movi reg, reg, 0x0
93
94 # Bit 6
95 srli t3, t1, 32, dataSize=8, flags=(EZF,)
96 ori t4, reg, 0x20
97 mov reg, reg, t4, flags=(nCEZF,)
98 mov t1, t1, t3, flags=(nCEZF,)
99
100 # Bit 5
101 srli t3, t1, 16, dataSize=8, flags=(EZF,)
102 ori t4, reg, 0x10
103 mov reg, reg, t4, flags=(nCEZF,)
104 mov t1, t1, t3, flags=(nCEZF,)
105
106 # Bit 4
107 srli t3, t1, 8, dataSize=8, flags=(EZF,)
108 ori t4, reg, 0x8
109 mov reg, reg, t4, flags=(nCEZF,)
110 mov t1, t1, t3, flags=(nCEZF,)
111
112 # Bit 3
113 srli t3, t1, 4, dataSize=8, flags=(EZF,)
114 ori t4, reg, 0x4
115 mov reg, reg, t4, flags=(nCEZF,)
116 mov t1, t1, t3, flags=(nCEZF,)
117
118 # Bit 2
119 srli t3, t1, 2, dataSize=8, flags=(EZF,)
120 ori t4, reg, 0x2
121 mov reg, reg, t4, flags=(nCEZF,)
122 mov t1, t1, t3, flags=(nCEZF,)
123
124 # Bit 1
125 srli t3, t1, 1, dataSize=8, flags=(EZF,)
126 ori t4, reg, 0x1
127 mov reg, reg, t4, flags=(nCEZF,)
128 mov t1, t1, t3, flags=(nCEZF,)
129
130end:
131 fault "NoFault"
132};
133
134def macroop BSF_R_M {
135
136 movi t1, t1, t0, dataSize=8
137 ld t1, seg, sib, disp
138
139 # Determine if the input was zero, and also move it to a temp reg.
140 and t1, t1, t1, flags=(ZF,)
141 bri t0, label("end"), flags=(CZF,)
142
143 # Zero out the result register
144 movi reg, reg, 0x0
145
146 # Bit 6
147 srli t3, t1, 32, dataSize=8, flags=(EZF,)
148 ori t4, reg, 0x20
149 mov reg, reg, t4, flags=(nCEZF,)
150 mov t1, t1, t3, flags=(nCEZF,)
151
152 # Bit 5
153 srli t3, t1, 16, dataSize=8, flags=(EZF,)
154 ori t4, reg, 0x10
155 mov reg, reg, t4, flags=(nCEZF,)
156 mov t1, t1, t3, flags=(nCEZF,)
157
158 # Bit 4
159 srli t3, t1, 8, dataSize=8, flags=(EZF,)
160 ori t4, reg, 0x8
161 mov reg, reg, t4, flags=(nCEZF,)
162 mov t1, t1, t3, flags=(nCEZF,)
163
164 # Bit 3
165 srli t3, t1, 4, dataSize=8, flags=(EZF,)
166 ori t4, reg, 0x4
167 mov reg, reg, t4, flags=(nCEZF,)
168 mov t1, t1, t3, flags=(nCEZF,)
169
170 # Bit 2
171 srli t3, t1, 2, dataSize=8, flags=(EZF,)
172 ori t4, reg, 0x2
173 mov reg, reg, t4, flags=(nCEZF,)
174 mov t1, t1, t3, flags=(nCEZF,)
175
176 # Bit 1
177 srli t3, t1, 1, dataSize=8, flags=(EZF,)
178 ori t4, reg, 0x1
179 mov reg, reg, t4, flags=(nCEZF,)
180 mov t1, t1, t3, flags=(nCEZF,)
181
182end:
183 fault "NoFault"
184};
185
186def macroop BSF_R_P {
187
188 rdip t7
189 movi t1, t1, t0, dataSize=8
190 ld t1, seg, riprel, disp
191
192 # Determine if the input was zero, and also move it to a temp reg.
193 and t1, t1, t1, flags=(ZF,)
194 bri t0, label("end"), flags=(CZF,)
195
196 # Zero out the result register
197 movi reg, reg, 0x0
198
199 # Bit 6
200 srli t3, t1, 32, dataSize=8, flags=(EZF,)
201 ori t4, reg, 0x20
202 mov reg, reg, t4, flags=(nCEZF,)
203 mov t1, t1, t3, flags=(nCEZF,)
204
205 # Bit 5
206 srli t3, t1, 16, dataSize=8, flags=(EZF,)
207 ori t4, reg, 0x10
208 mov reg, reg, t4, flags=(nCEZF,)
209 mov t1, t1, t3, flags=(nCEZF,)
210
211 # Bit 4
212 srli t3, t1, 8, dataSize=8, flags=(EZF,)
213 ori t4, reg, 0x8
214 mov reg, reg, t4, flags=(nCEZF,)
215 mov t1, t1, t3, flags=(nCEZF,)
216
217 # Bit 3
218 srli t3, t1, 4, dataSize=8, flags=(EZF,)
219 ori t4, reg, 0x4
220 mov reg, reg, t4, flags=(nCEZF,)
221 mov t1, t1, t3, flags=(nCEZF,)
222
223 # Bit 2
224 srli t3, t1, 2, dataSize=8, flags=(EZF,)
225 ori t4, reg, 0x2
226 mov reg, reg, t4, flags=(nCEZF,)
227 mov t1, t1, t3, flags=(nCEZF,)
228
229 # Bit 1
230 srli t3, t1, 1, dataSize=8, flags=(EZF,)
231 ori t4, reg, 0x1
232 mov reg, reg, t4, flags=(nCEZF,)
233 mov t1, t1, t3, flags=(nCEZF,)
234
235end:
236 fault "NoFault"
237};
238
239def macroop BSR_R_R {
240 # Determine if the input was zero, and also move it to a temp reg.
241 mov t1, t1, t0, dataSize=8
242 and t1, regm, regm, flags=(ZF,)
243 bri t0, label("end"), flags=(CZF,)
244
245 # Zero out the result register
246 movi reg, reg, 0
247
248 subi t2, t1, 1
249 xor t1, t2, t1
250
251 # Bit 6
252 srli t3, t1, 32, dataSize=8
253 andi t3, t3, 32
254 or reg, reg, t3
255
256 # Bit 5
257 srli t3, t1, 16, dataSize=8
258 andi t3, t3, 16
259 or reg, reg, t3
260
261 # Bit 4
262 srli t3, t1, 8, dataSize=8
263 andi t3, t3, 8
264 or reg, reg, t3
265
266 # Bit 3
267 srli t3, t1, 4, dataSize=8
268 andi t3, t3, 4
269 or reg, reg, t3
270
271 # Bit 2
272 srli t3, t1, 2, dataSize=8
273 andi t3, t3, 2
274 or reg, reg, t3
275
276 # Bit 1
277 srli t3, t1, 1, dataSize=8
278 andi t3, t3, 1
279 or reg, reg, t3
280
281end:
282 fault "NoFault"
283};
284
285def macroop BSR_R_M {
286
287 mov t1, t1, t0, dataSize=8
288 ld t1, seg, sib, disp
289
290 # Determine if the input was zero, and also move it to a temp reg.
291 and t1, t1, t1, flags=(ZF,)
292 bri t0, label("end"), flags=(CZF,)
293
294 # Zero out the result register
295 mov reg, reg, t0
296
297 subi t2, t1, 1
298 xor t1, t2, t1
299
300 # Bit 6
301 srli t3, t1, 32, dataSize=8
302 andi t3, t3, 32
303 or reg, reg, t3
304
305 # Bit 5
306 srli t3, t1, 16, dataSize=8
307 andi t3, t3, 16
308 or reg, reg, t3
309
310 # Bit 4
311 srli t3, t1, 8, dataSize=8
312 andi t3, t3, 8
313 or reg, reg, t3
314
315 # Bit 3
316 srli t3, t1, 4, dataSize=8
317 andi t3, t3, 4
318 or reg, reg, t3
319
320 # Bit 2
321 srli t3, t1, 2, dataSize=8
322 andi t3, t3, 2
323 or reg, reg, t3
324
325 # Bit 1
326 srli t3, t1, 1, dataSize=8
327 andi t3, t3, 1
328 or reg, reg, t3
329
330end:
331 fault "NoFault"
332};
333
334def macroop BSR_R_P {
335
336 rdip t7
337 mov t1, t1, t0, dataSize=8
338 ld t1, seg, riprel, disp
339
340 # Determine if the input was zero, and also move it to a temp reg.
341 and t1, t1, t1, flags=(ZF,)
342 bri t0, label("end"), flags=(CZF,)
343
344 # Zero out the result register
345 mov reg, reg, t0
346
347 subi t2, t1, 1
348 xor t1, t2, t1
349
350 # Bit 6
351 srli t3, t1, 32, dataSize=8
352 andi t3, t3, 32
353 or reg, reg, t3
354
355 # Bit 5
356 srli t3, t1, 16, dataSize=8
357 andi t3, t3, 16
358 or reg, reg, t3
359
360 # Bit 4
361 srli t3, t1, 8, dataSize=8
362 andi t3, t3, 8
363 or reg, reg, t3
364
365 # Bit 3
366 srli t3, t1, 4, dataSize=8
367 andi t3, t3, 4
368 or reg, reg, t3
369
370 # Bit 2
371 srli t3, t1, 2, dataSize=8
372 andi t3, t3, 2
373 or reg, reg, t3
374
375 # Bit 1
376 srli t3, t1, 1, dataSize=8
377 andi t3, t3, 1
378 or reg, reg, t3
379
380end:
381 fault "NoFault"
382};
383'''