1# Copyright (c) 2007 The Hewlett-Packard Development Company 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Gabe Black 37 38microcode = ''' 39def macroop ADD_R_R 40{ 41 add reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 42}; 43 44def macroop ADD_R_I 45{ 46 limm t1, imm 47 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 48}; 49 50def macroop ADD_M_I 51{ 52 limm t2, imm 53 ldst t1, seg, sib, disp 54 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 55 st t1, seg, sib, disp 56}; 57 58def macroop ADD_P_I 59{ 60 rdip t7 61 limm t2, imm 62 ldst t1, seg, riprel, disp 63 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 64 st t1, seg, riprel, disp 65}; 66 67def macroop ADD_LOCKED_M_I 68{ 69 limm t2, imm
| 1# Copyright (c) 2007 The Hewlett-Packard Development Company 2# All rights reserved. 3# 4# The license below extends only to copyright in the software and shall 5# not be construed as granting a license to any other intellectual 6# property including but not limited to intellectual property relating 7# to a hardware implementation of the functionality of the software 8# licensed hereunder. You may use the software subject to the license 9# terms below provided that you ensure that this notice is replicated 10# unmodified and in its entirety in all distributions of the software, 11# modified or unmodified, in source code or in binary form. 12# 13# Redistribution and use in source and binary forms, with or without 14# modification, are permitted provided that the following conditions are 15# met: redistributions of source code must retain the above copyright 16# notice, this list of conditions and the following disclaimer; 17# redistributions in binary form must reproduce the above copyright 18# notice, this list of conditions and the following disclaimer in the 19# documentation and/or other materials provided with the distribution; 20# neither the name of the copyright holders nor the names of its 21# contributors may be used to endorse or promote products derived from 22# this software without specific prior written permission. 23# 24# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35# 36# Authors: Gabe Black 37 38microcode = ''' 39def macroop ADD_R_R 40{ 41 add reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 42}; 43 44def macroop ADD_R_I 45{ 46 limm t1, imm 47 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 48}; 49 50def macroop ADD_M_I 51{ 52 limm t2, imm 53 ldst t1, seg, sib, disp 54 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 55 st t1, seg, sib, disp 56}; 57 58def macroop ADD_P_I 59{ 60 rdip t7 61 limm t2, imm 62 ldst t1, seg, riprel, disp 63 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 64 st t1, seg, riprel, disp 65}; 66 67def macroop ADD_LOCKED_M_I 68{ 69 limm t2, imm
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| 70 mfence
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70 ldstl t1, seg, sib, disp 71 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 72 stul t1, seg, sib, disp
| 71 ldstl t1, seg, sib, disp 72 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 73 stul t1, seg, sib, disp
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| 74 mfence
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73}; 74 75def macroop ADD_LOCKED_P_I 76{ 77 rdip t7 78 limm t2, imm
| 75}; 76 77def macroop ADD_LOCKED_P_I 78{ 79 rdip t7 80 limm t2, imm
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| 81 mfence
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79 ldstl t1, seg, riprel, disp 80 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 81 stul t1, seg, riprel, disp
| 82 ldstl t1, seg, riprel, disp 83 add t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 84 stul t1, seg, riprel, disp
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| 85 mfence
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82}; 83 84def macroop ADD_M_R 85{ 86 ldst t1, seg, sib, disp 87 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 88 st t1, seg, sib, disp 89}; 90 91def macroop ADD_P_R 92{ 93 rdip t7 94 ldst t1, seg, riprel, disp 95 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 96 st t1, seg, riprel, disp 97}; 98 99def macroop ADD_LOCKED_M_R 100{
| 86}; 87 88def macroop ADD_M_R 89{ 90 ldst t1, seg, sib, disp 91 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 92 st t1, seg, sib, disp 93}; 94 95def macroop ADD_P_R 96{ 97 rdip t7 98 ldst t1, seg, riprel, disp 99 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 100 st t1, seg, riprel, disp 101}; 102 103def macroop ADD_LOCKED_M_R 104{
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| 105 mfence
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101 ldstl t1, seg, sib, disp 102 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 103 stul t1, seg, sib, disp
| 106 ldstl t1, seg, sib, disp 107 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 108 stul t1, seg, sib, disp
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| 109 mfence
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104}; 105 106def macroop ADD_LOCKED_P_R 107{ 108 rdip t7
| 110}; 111 112def macroop ADD_LOCKED_P_R 113{ 114 rdip t7
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| 115 mfence
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109 ldstl t1, seg, riprel, disp 110 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 111 stul t1, seg, riprel, disp
| 116 ldstl t1, seg, riprel, disp 117 add t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 118 stul t1, seg, riprel, disp
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| 119 mfence
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112}; 113 114def macroop ADD_R_M 115{ 116 ld t1, seg, sib, disp 117 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 118}; 119 120def macroop ADD_R_P 121{ 122 rdip t7 123 ld t1, seg, riprel, disp 124 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 125}; 126 127def macroop SUB_R_R 128{ 129 sub reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 130}; 131 132def macroop SUB_R_I 133{ 134 limm t1, imm 135 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 136}; 137 138def macroop SUB_R_M 139{ 140 ld t1, seg, sib, disp 141 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 142}; 143 144def macroop SUB_R_P 145{ 146 rdip t7 147 ld t1, seg, riprel, disp 148 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 149}; 150 151def macroop SUB_M_I 152{ 153 limm t2, imm 154 ldst t1, seg, sib, disp 155 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 156 st t1, seg, sib, disp 157}; 158 159def macroop SUB_P_I 160{ 161 rdip t7 162 limm t2, imm 163 ldst t1, seg, riprel, disp 164 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 165 st t1, seg, riprel, disp 166}; 167 168def macroop SUB_LOCKED_M_I 169{ 170 limm t2, imm
| 120}; 121 122def macroop ADD_R_M 123{ 124 ld t1, seg, sib, disp 125 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 126}; 127 128def macroop ADD_R_P 129{ 130 rdip t7 131 ld t1, seg, riprel, disp 132 add reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 133}; 134 135def macroop SUB_R_R 136{ 137 sub reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 138}; 139 140def macroop SUB_R_I 141{ 142 limm t1, imm 143 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 144}; 145 146def macroop SUB_R_M 147{ 148 ld t1, seg, sib, disp 149 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 150}; 151 152def macroop SUB_R_P 153{ 154 rdip t7 155 ld t1, seg, riprel, disp 156 sub reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 157}; 158 159def macroop SUB_M_I 160{ 161 limm t2, imm 162 ldst t1, seg, sib, disp 163 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 164 st t1, seg, sib, disp 165}; 166 167def macroop SUB_P_I 168{ 169 rdip t7 170 limm t2, imm 171 ldst t1, seg, riprel, disp 172 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 173 st t1, seg, riprel, disp 174}; 175 176def macroop SUB_LOCKED_M_I 177{ 178 limm t2, imm
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| 179 mfence
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171 ldstl t1, seg, sib, disp 172 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 173 stul t1, seg, sib, disp
| 180 ldstl t1, seg, sib, disp 181 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 182 stul t1, seg, sib, disp
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| 183 mfence
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174}; 175 176def macroop SUB_LOCKED_P_I 177{ 178 rdip t7 179 limm t2, imm
| 184}; 185 186def macroop SUB_LOCKED_P_I 187{ 188 rdip t7 189 limm t2, imm
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| 190 mfence
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180 ldstl t1, seg, riprel, disp 181 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 182 stul t1, seg, riprel, disp
| 191 ldstl t1, seg, riprel, disp 192 sub t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 193 stul t1, seg, riprel, disp
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| 194 mfence
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183}; 184 185def macroop SUB_M_R 186{ 187 ldst t1, seg, sib, disp 188 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 189 st t1, seg, sib, disp 190}; 191 192def macroop SUB_P_R 193{ 194 rdip t7 195 ldst t1, seg, riprel, disp 196 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 197 st t1, seg, riprel, disp 198}; 199 200def macroop SUB_LOCKED_M_R 201{
| 195}; 196 197def macroop SUB_M_R 198{ 199 ldst t1, seg, sib, disp 200 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 201 st t1, seg, sib, disp 202}; 203 204def macroop SUB_P_R 205{ 206 rdip t7 207 ldst t1, seg, riprel, disp 208 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 209 st t1, seg, riprel, disp 210}; 211 212def macroop SUB_LOCKED_M_R 213{
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| 214 mfence
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202 ldstl t1, seg, sib, disp 203 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 204 stul t1, seg, sib, disp
| 215 ldstl t1, seg, sib, disp 216 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 217 stul t1, seg, sib, disp
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| 218 mfence
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205}; 206 207def macroop SUB_LOCKED_P_R 208{ 209 rdip t7
| 219}; 220 221def macroop SUB_LOCKED_P_R 222{ 223 rdip t7
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| 224 mfence
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210 ldstl t1, seg, riprel, disp 211 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 212 stul t1, seg, riprel, disp
| 225 ldstl t1, seg, riprel, disp 226 sub t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 227 stul t1, seg, riprel, disp
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| 228 mfence
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213}; 214 215def macroop ADC_R_R 216{ 217 adc reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 218}; 219 220def macroop ADC_R_I 221{ 222 limm t1, imm 223 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 224}; 225 226def macroop ADC_M_I 227{ 228 limm t2, imm 229 ldst t1, seg, sib, disp 230 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 231 st t1, seg, sib, disp 232}; 233 234def macroop ADC_P_I 235{ 236 rdip t7 237 limm t2, imm 238 ldst t1, seg, riprel, disp 239 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 240 st t1, seg, riprel, disp 241}; 242 243def macroop ADC_LOCKED_M_I 244{ 245 limm t2, imm
| 229}; 230 231def macroop ADC_R_R 232{ 233 adc reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 234}; 235 236def macroop ADC_R_I 237{ 238 limm t1, imm 239 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 240}; 241 242def macroop ADC_M_I 243{ 244 limm t2, imm 245 ldst t1, seg, sib, disp 246 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 247 st t1, seg, sib, disp 248}; 249 250def macroop ADC_P_I 251{ 252 rdip t7 253 limm t2, imm 254 ldst t1, seg, riprel, disp 255 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 256 st t1, seg, riprel, disp 257}; 258 259def macroop ADC_LOCKED_M_I 260{ 261 limm t2, imm
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| 262 mfence
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246 ldstl t1, seg, sib, disp 247 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 248 stul t1, seg, sib, disp
| 263 ldstl t1, seg, sib, disp 264 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 265 stul t1, seg, sib, disp
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| 266 mfence
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249}; 250 251def macroop ADC_LOCKED_P_I 252{ 253 rdip t7 254 limm t2, imm
| 267}; 268 269def macroop ADC_LOCKED_P_I 270{ 271 rdip t7 272 limm t2, imm
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| 273 mfence
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255 ldstl t1, seg, riprel, disp 256 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 257 stul t1, seg, riprel, disp
| 274 ldstl t1, seg, riprel, disp 275 adc t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 276 stul t1, seg, riprel, disp
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| 277 mfence
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258}; 259 260def macroop ADC_M_R 261{ 262 ldst t1, seg, sib, disp 263 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 264 st t1, seg, sib, disp 265}; 266 267def macroop ADC_P_R 268{ 269 rdip t7 270 ldst t1, seg, riprel, disp 271 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 272 st t1, seg, riprel, disp 273}; 274 275def macroop ADC_LOCKED_M_R 276{
| 278}; 279 280def macroop ADC_M_R 281{ 282 ldst t1, seg, sib, disp 283 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 284 st t1, seg, sib, disp 285}; 286 287def macroop ADC_P_R 288{ 289 rdip t7 290 ldst t1, seg, riprel, disp 291 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 292 st t1, seg, riprel, disp 293}; 294 295def macroop ADC_LOCKED_M_R 296{
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| 297 mfence
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277 ldstl t1, seg, sib, disp 278 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 279 stul t1, seg, sib, disp
| 298 ldstl t1, seg, sib, disp 299 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 300 stul t1, seg, sib, disp
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| 301 mfence
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280}; 281 282def macroop ADC_LOCKED_P_R 283{ 284 rdip t7
| 302}; 303 304def macroop ADC_LOCKED_P_R 305{ 306 rdip t7
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| 307 mfence
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285 ldstl t1, seg, riprel, disp 286 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 287 stul t1, seg, riprel, disp
| 308 ldstl t1, seg, riprel, disp 309 adc t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 310 stul t1, seg, riprel, disp
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| 311 mfence
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288}; 289 290def macroop ADC_R_M 291{ 292 ld t1, seg, sib, disp 293 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 294}; 295 296def macroop ADC_R_P 297{ 298 rdip t7 299 ld t1, seg, riprel, disp 300 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 301}; 302 303def macroop SBB_R_R 304{ 305 sbb reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 306}; 307 308def macroop SBB_R_I 309{ 310 limm t1, imm 311 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 312}; 313 314def macroop SBB_R_M 315{ 316 ld t1, seg, sib, disp 317 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 318}; 319 320def macroop SBB_R_P 321{ 322 rdip t7 323 ld t1, seg, riprel, disp 324 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 325}; 326 327def macroop SBB_M_I 328{ 329 limm t2, imm 330 ldst t1, seg, sib, disp 331 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 332 st t1, seg, sib, disp 333}; 334 335def macroop SBB_P_I 336{ 337 rdip t7 338 limm t2, imm 339 ldst t1, seg, riprel, disp 340 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 341 st t1, seg, riprel, disp 342}; 343 344def macroop SBB_LOCKED_M_I 345{ 346 limm t2, imm
| 312}; 313 314def macroop ADC_R_M 315{ 316 ld t1, seg, sib, disp 317 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 318}; 319 320def macroop ADC_R_P 321{ 322 rdip t7 323 ld t1, seg, riprel, disp 324 adc reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 325}; 326 327def macroop SBB_R_R 328{ 329 sbb reg, reg, regm, flags=(OF,SF,ZF,AF,PF,CF) 330}; 331 332def macroop SBB_R_I 333{ 334 limm t1, imm 335 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 336}; 337 338def macroop SBB_R_M 339{ 340 ld t1, seg, sib, disp 341 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 342}; 343 344def macroop SBB_R_P 345{ 346 rdip t7 347 ld t1, seg, riprel, disp 348 sbb reg, reg, t1, flags=(OF,SF,ZF,AF,PF,CF) 349}; 350 351def macroop SBB_M_I 352{ 353 limm t2, imm 354 ldst t1, seg, sib, disp 355 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 356 st t1, seg, sib, disp 357}; 358 359def macroop SBB_P_I 360{ 361 rdip t7 362 limm t2, imm 363 ldst t1, seg, riprel, disp 364 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 365 st t1, seg, riprel, disp 366}; 367 368def macroop SBB_LOCKED_M_I 369{ 370 limm t2, imm
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| 371 mfence
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347 ldstl t1, seg, sib, disp 348 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 349 stul t1, seg, sib, disp
| 372 ldstl t1, seg, sib, disp 373 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 374 stul t1, seg, sib, disp
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| 375 mfence
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350}; 351 352def macroop SBB_LOCKED_P_I 353{ 354 rdip t7 355 limm t2, imm
| 376}; 377 378def macroop SBB_LOCKED_P_I 379{ 380 rdip t7 381 limm t2, imm
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| 382 mfence
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356 ldstl t1, seg, riprel, disp 357 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 358 stul t1, seg, riprel, disp
| 383 ldstl t1, seg, riprel, disp 384 sbb t1, t1, t2, flags=(OF,SF,ZF,AF,PF,CF) 385 stul t1, seg, riprel, disp
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| 386 mfence
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359}; 360 361def macroop SBB_M_R 362{ 363 ldst t1, seg, sib, disp 364 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 365 st t1, seg, sib, disp 366}; 367 368def macroop SBB_P_R 369{ 370 rdip t7 371 ldst t1, seg, riprel, disp 372 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 373 st t1, seg, riprel, disp 374}; 375 376def macroop SBB_LOCKED_M_R 377{
| 387}; 388 389def macroop SBB_M_R 390{ 391 ldst t1, seg, sib, disp 392 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 393 st t1, seg, sib, disp 394}; 395 396def macroop SBB_P_R 397{ 398 rdip t7 399 ldst t1, seg, riprel, disp 400 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 401 st t1, seg, riprel, disp 402}; 403 404def macroop SBB_LOCKED_M_R 405{
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| 406 mfence
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378 ldstl t1, seg, sib, disp 379 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 380 stul t1, seg, sib, disp
| 407 ldstl t1, seg, sib, disp 408 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 409 stul t1, seg, sib, disp
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| 410 mfence
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381}; 382 383def macroop SBB_LOCKED_P_R 384{ 385 rdip t7
| 411}; 412 413def macroop SBB_LOCKED_P_R 414{ 415 rdip t7
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| 416 mfence
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386 ldstl t1, seg, riprel, disp 387 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 388 stul t1, seg, riprel, disp
| 417 ldstl t1, seg, riprel, disp 418 sbb t1, t1, reg, flags=(OF,SF,ZF,AF,PF,CF) 419 stul t1, seg, riprel, disp
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| 420 mfence
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389}; 390 391def macroop NEG_R 392{ 393 sub reg, t0, reg, flags=(CF,OF,SF,ZF,AF,PF) 394}; 395 396def macroop NEG_M 397{ 398 ldst t1, seg, sib, disp 399 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 400 st t1, seg, sib, disp 401}; 402 403def macroop NEG_P 404{ 405 rdip t7 406 ldst t1, seg, riprel, disp 407 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 408 st t1, seg, riprel, disp 409}; 410 411def macroop NEG_LOCKED_M 412{
| 421}; 422 423def macroop NEG_R 424{ 425 sub reg, t0, reg, flags=(CF,OF,SF,ZF,AF,PF) 426}; 427 428def macroop NEG_M 429{ 430 ldst t1, seg, sib, disp 431 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 432 st t1, seg, sib, disp 433}; 434 435def macroop NEG_P 436{ 437 rdip t7 438 ldst t1, seg, riprel, disp 439 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 440 st t1, seg, riprel, disp 441}; 442 443def macroop NEG_LOCKED_M 444{
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| 445 mfence
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413 ldstl t1, seg, sib, disp 414 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 415 stul t1, seg, sib, disp
| 446 ldstl t1, seg, sib, disp 447 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 448 stul t1, seg, sib, disp
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| 449 mfence
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416}; 417 418def macroop NEG_LOCKED_P 419{ 420 rdip t7
| 450}; 451 452def macroop NEG_LOCKED_P 453{ 454 rdip t7
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| 455 mfence
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421 ldstl t1, seg, riprel, disp 422 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 423 stul t1, seg, riprel, disp
| 456 ldstl t1, seg, riprel, disp 457 sub t1, t0, t1, flags=(CF,OF,SF,ZF,AF,PF) 458 stul t1, seg, riprel, disp
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| 459 mfence
|
424}; 425'''
| 460}; 461'''
|