monitor_mwait.isa (10773:16643e7b322a) | monitor_mwait.isa (11303:f694764d656d) |
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1// Copyright (c) AMD 2// All rights reserved. 3// 4// Authors: Marc Orr 5 6// Monitor Instruction 7 8output header {{ --- 53 unchanged lines hidden (view full) --- 62 %(MwaitExecDeclare)s 63 }; 64}}; 65 66def template MwaitInitiateAcc {{ 67 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc, 68 Trace::InstRecord * traceData) const 69 { | 1// Copyright (c) AMD 2// All rights reserved. 3// 4// Authors: Marc Orr 5 6// Monitor Instruction 7 8output header {{ --- 53 unchanged lines hidden (view full) --- 62 %(MwaitExecDeclare)s 63 }; 64}}; 65 66def template MwaitInitiateAcc {{ 67 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT * xc, 68 Trace::InstRecord * traceData) const 69 { |
70 uint64_t m = 0; //mem | |
71 unsigned s = 0x8; //size 72 unsigned f = 0; //flags | 70 unsigned s = 0x8; //size 71 unsigned f = 0; //flags |
73 readMemTiming(xc, traceData, xc->getAddrMonitor()->vAddr, m, s, f); | 72 initiateMemRead(xc, traceData, xc->getAddrMonitor()->vAddr, s, f); |
74 return NoFault; 75 } 76}}; 77 78def template MwaitCompleteAcc {{ 79 Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT *xc, 80 Trace::InstRecord *traceData) const 81 { --- 50 unchanged lines hidden --- | 73 return NoFault; 74 } 75}}; 76 77def template MwaitCompleteAcc {{ 78 Fault %(class_name)s::completeAcc(PacketPtr pkt, CPU_EXEC_CONTEXT *xc, 79 Trace::InstRecord *traceData) const 80 { --- 50 unchanged lines hidden --- |