1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any
9// use which is NOT directed to receiving any direct monetary
10// compensation for, or commercial advantage from such use. Illustrative
11// examples of non-commercial use are academic research, personal study,
12// teaching, education and corporate research & development.
13// Illustrative examples of commercial use are distributing products for
14// commercial advantage and providing services using the software for
15// commercial advantage.
16//
17// If you wish to use this software or functionality therein that may be
18// covered by patents for commercial use, please contact:
19// Director of Intellectual Property Licensing
20// Office of Strategy and Technology
21// Hewlett-Packard Company
22// 1501 Page Mill Road
23// Palo Alto, California 94304
24//
25// Redistributions of source code must retain the above copyright notice,
26// this list of conditions and the following disclaimer. Redistributions
27// in binary form must reproduce the above copyright notice, this list of
28// conditions and the following disclaimer in the documentation and/or
29// other materials provided with the distribution. Neither the name of
30// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
31// contributors may be used to endorse or promote products derived from
32// this software without specific prior written permission. No right of
33// sublicense is granted herewith. Derivatives of the software and
34// output created using the software may be prepared, but only for
35// Non-Commercial Uses. Derivatives of the software may be shared with
36// others provided: (i) the others agree to abide by the list of
37// conditions herein which includes the Non-Commercial Use restrictions;
38// and (ii) such Derivatives of the software include the above copyright
39// notice to acknowledge the contribution from this software where
40// applicable, this list of conditions and the disclaimer below.
41//
42// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53//
54// Authors: Gabe Black
55
56////////////////////////////////////////////////////////////////////
57//
58// Decode the one byte opcodes
59//
60
610x1: decode OPCODE_OP_TOP5 {
62 format Inst {
63 0x00: decode OPCODE_OP_BOTTOM3 {
64 0x6: decode MODE_SUBMODE {
65 0x0: UD2();
66 default: WarnUnimpl::push_ES();
67 }
68 0x7: decode MODE_SUBMODE {
69 0x0: UD2();
70 default: WarnUnimpl::pop_ES();
71 }
72 default: MultiInst::ADD(OPCODE_OP_BOTTOM3,
73 [Eb,Gb], [Ev,Gv],
74 [Gb,Eb], [Gv,Ev],
75 [rAb,Ib], [rAv,Iz]);
76 }
77 0x01: decode OPCODE_OP_BOTTOM3 {
78 0x6: decode MODE_SUBMODE {
79 0x0: UD2();
80 default: WarnUnimpl::push_CS();
81 }
82 //Any time this is seen, it should generate a two byte opcode
83 0x7: M5InternalError::error(
84 {{"Saw a one byte opcode whose value was 0x0F!"}});
85 default: MultiInst::OR(OPCODE_OP_BOTTOM3,
86 [Eb,Gb], [Ev,Gv],
87 [Gb,Eb], [Gv,Ev],
88 [rAb,Ib], [rAv,Iz]);
89 }
90 0x02: decode OPCODE_OP_BOTTOM3 {
91 0x6: decode MODE_SUBMODE {
92 0x0: UD2();
93 default: WarnUnimpl::push_SS();
94 }
95 0x7: decode MODE_SUBMODE {
96 0x0: UD2();
97 default: WarnUnimpl::pop_SS();
98 }
99 default: MultiInst::ADC(OPCODE_OP_BOTTOM3,
100 [Eb,Gb], [Ev,Gv],
101 [Gb,Eb], [Gv,Ev],
102 [rAb,Ib], [rAv,Iz]);
103 }
104 0x03: decode OPCODE_OP_BOTTOM3 {
105 0x6: decode MODE_SUBMODE {
106 0x0: UD2();
107 default: WarnUnimpl::push_DS();
108 }
109 0x7: decode MODE_SUBMODE {
110 0x0: UD2();
111 default: WarnUnimpl::pop_DS();
112 }
113 default: MultiInst::SBB(OPCODE_OP_BOTTOM3,
114 [Eb,Gb], [Ev,Gv],
115 [Gb,Eb], [Gv,Ev],
116 [rAb,Ib], [rAv,Iz]);
117 }
118 0x04: decode OPCODE_OP_BOTTOM3 {
119 0x6: M5InternalError::error(
120 {{"Tried to execute the ES segment override prefix!"}});
121 0x7: decode MODE_SUBMODE {
122 0x0: UD2();
123 default: WarnUnimpl::daa();
124 }
125 default: MultiInst::AND(OPCODE_OP_BOTTOM3,
126 [Eb,Gb], [Ev,Gv],
127 [Gb,Eb], [Gv,Ev],
128 [rAb,Ib], [rAv,Iz]);
129 }
130 0x05: decode OPCODE_OP_BOTTOM3 {
131 0x6: M5InternalError::error(
132 {{"Tried to execute the CS segment override prefix!"}});
133 0x7: decode MODE_SUBMODE {
134 0x0: UD2();
135 default: WarnUnimpl::das();
136 }
137 default: MultiInst::SUB(OPCODE_OP_BOTTOM3,
138 [Eb,Gb], [Ev,Gv],
139 [Gb,Eb], [Gv,Ev],
140 [rAb,Ib], [rAv,Iz]);
141 }
142 0x06: decode OPCODE_OP_BOTTOM3 {
143 0x6: M5InternalError::error(
144 {{"Tried to execute the SS segment override prefix!"}});
145 0x7: decode MODE_SUBMODE {
146 0x0: UD2();
147 default: WarnUnimpl::aaa();
148 }
149 default: MultiInst::XOR(OPCODE_OP_BOTTOM3,
150 [Eb,Gb], [Ev,Gv],
151 [Gb,Eb], [Gv,Ev],
152 [rAb,Ib], [rAv,Iz]);
153 }
154 0x07: decode OPCODE_OP_BOTTOM3 {
155 0x6: M5InternalError::error(
156 {{"Tried to execute the DS segment override prefix!"}});
157 0x7: decode MODE_SUBMODE {
158 0x0: UD2();
159 default: WarnUnimpl::aas();
160 }
161 default: MultiInst::CMP(OPCODE_OP_BOTTOM3,
162 [Eb,Gb], [Ev,Gv],
163 [Gb,Eb], [Gv,Ev],
164 [rAb,Ib], [rAv,Iz]);
165 }
166 0x08: decode MODE_SUBMODE {
167 0x0: M5InternalError::error (
168 {{"Tried to execute an REX prefix!"}});
169 default: INC(Bv);
170 }
171 0x09: decode MODE_SUBMODE {
172 0x0: M5InternalError::error (
173 {{"Tried to execute an REX prefix!"}});
174 default: DEC(Bv);
175 }
176 0x0A: PUSH(Bv);
177 0x0B: POP(Bv);
178 0x0C: decode OPCODE_OP_BOTTOM3 {
179 0x0: decode MODE_SUBMODE {
180 0x0: UD2();
181 default: PUSHA();
182 }
183 0x1: decode MODE_SUBMODE {
184 0x0: UD2();
185 default: POPA();
186 }
187 0x2: decode MODE_SUBMODE {
188 0x0: UD2();
189 default: BOUND(Gv,Mv);
190 }
191 0x3: decode MODE_SUBMODE {
192 //The second operand should really be of size "d", but it's
193 //set to "v" in order to have a consistent register size.
194 //This shouldn't affect behavior.
195 0x0: MOVSXD(Gv,Ev);
196 default: WarnUnimpl::arpl_Ew_Gw();
197 }
198 0x4: M5InternalError::error(
199 {{"Tried to execute the FS segment override prefix!"}});
200 0x5: M5InternalError::error(
201 {{"Tried to execute the GS segment override prefix!"}});
202 0x6: M5InternalError::error(
203 {{"Tried to execute the operand size override prefix!"}});
204 0x7: M5InternalError::error(
205 {{"Tried to execute the DS address size override prefix!"}});
206 }
207 0x0D: decode OPCODE_OP_BOTTOM3 {
208 0x0: PUSH(Iz);
209 0x1: IMUL(Gv,Ev,Iz);
210 0x2: PUSH(Ib);
211 0x3: IMUL(Gv,Ev,Ib);
212 0x4: StringInst::INS(Yb,rD);
213 0x5: StringInst::INS(Yz,rD);
214 0x6: StringInst::OUTS(rD,Xb);
215 0x7: StringInst::OUTS(rD,Xz);
216 }
217 0x0E: decode OPCODE_OP_BOTTOM3 {
218 0x0: JO(Jb);
219 0x1: JNO(Jb);
220 0x2: JB(Jb);
221 0x3: JNB(Jb);
222 0x4: JZ(Jb);
223 0x5: JNZ(Jb);
224 0x6: JBE(Jb);
225 0x7: JNBE(Jb);
226 }
227 0x0F: decode OPCODE_OP_BOTTOM3 {
228 0x0: JS(Jb);
229 0x1: JNS(Jb);
230 0x2: JP(Jb);
231 0x3: JNP(Jb);
232 0x4: JL(Jb);
233 0x5: JNL(Jb);
234 0x6: JLE(Jb);
235 0x7: JNLE(Jb);
236 }
237 0x10: decode OPCODE_OP_BOTTOM3 {
238 //0x0: group1_Eb_Ib();
239 0x0: decode MODRM_REG {
240 0x0: ADD(Eb,Ib);
241 0x1: OR(Eb,Ib);
242 0x2: ADC(Eb,Ib);
243 0x3: SBB(Eb,Ib);
244 0x4: AND(Eb,Ib);
245 0x5: SUB(Eb,Ib);
246 0x6: XOR(Eb,Ib);
247 0x7: CMP(Eb,Ib);
248 }
249 //0x1: group1_Ev_Iz();
250 0x1: decode MODRM_REG {
251 0x0: ADD(Ev,Iz);
252 0x1: OR(Ev,Iz);
253 0x2: ADC(Ev,Iz);
254 0x3: SBB(Ev,Iz);
255 0x4: AND(Ev,Iz);
256 0x5: SUB(Ev,Iz);
257 0x6: XOR(Ev,Iz);
258 0x7: CMP(Ev,Iz);
259 }
260 0x2: decode MODE_SUBMODE {
261 0x0: UD2();
262 //default: group1_Eb_Ib();
263 default: decode MODRM_REG {
264 0x0: ADD(Eb,Ib);
265 0x1: OR(Eb,Ib);
266 0x2: ADC(Eb,Ib);
267 0x3: SBB(Eb,Ib);
268 0x4: AND(Eb,Ib);
269 0x5: SUB(Eb,Ib);
270 0x6: XOR(Eb,Ib);
271 0x7: CMP(Eb,Ib);
272 }
273 }
274 //0x3: group1_Ev_Ib();
275 0x3: decode MODRM_REG {
276 0x0: ADD(Ev,Ib);
277 0x1: OR(Ev,Ib);
278 0x2: ADC(Ev,Ib);
279 0x3: SBB(Ev,Ib);
280 0x4: AND(Ev,Ib);
281 0x5: SUB(Ev,Ib);
282 0x6: XOR(Ev,Ib);
283 0x7: CMP(Ev,Ib);
284 }
285 0x4: TEST(Eb,Gb);
286 0x5: TEST(Ev,Gv);
287 0x6: XCHG(Eb,Gb);
288 0x7: XCHG(Ev,Gv);
289 }
290 0x11: decode OPCODE_OP_BOTTOM3 {
291 0x0: MOV(Eb,Gb);
292 0x1: MOV(Ev,Gv);
293 0x2: MOV(Gb,Eb);
294 0x3: MOV(Gv,Ev);
295 0x4: decode MODRM_REG {
296 0x0, 0x1, 0x2,
297 0x3, 0x4, 0x5: MOV(Ev,Sv);
298 }
299 0x5: LEA(Gv,M);
300 0x6: decode MODE_SUBMODE {
301 0x3, 0x4: MOV_REAL(Sv,Ev);
302 default: decode MODRM_REG {
303 0x1: UD2(); // Moving to the CS selector is illegal.
304 0x2: MOVSS(Sv,Ev);
305 0x0, 0x3,
306 0x4, 0x5: MOV(Sv,Ev);
307 default: UD2();
308 }
309 }
310 //0x7: group10_Ev();
311 0x7: decode MODRM_REG {
312 0x0: POP(Ev);
313 default: UD2();
314 }
315 }
316 0x12: decode OPCODE_OP_BOTTOM3 {
317 0x0: NOP(); //XXX repe makes this a "pause"
318 default: XCHG(Bv,rAv);
319 }
320 0x13: decode OPCODE_OP_BOTTOM3 {
321 0x0: CDQE(rAv);
322 0x1: CQO(rAv,rDv);
323 0x2: decode MODE_SUBMODE {
324 0x0: UD2();
325 default: WarnUnimpl::call_far_Ap();
326 }
327 0x3: WarnUnimpl::fwait(); //aka wait
328 0x4: PUSHF();
329 0x5: POPF();
330 //The 64 bit versions of both of these should be illegal only
331 //if CPUID says it isn't supported. For now, we'll just assume
332 //that it's supported.
333 0x6: decode MODE_SUBMODE {
334 0x0: SAHF_64();
335 default: SAHF();
336 }
337 0x7: decode MODE_SUBMODE {
338 0x0: LAHF_64();
339 default: LAHF();
340 }
341 }
342 0x14: decode OPCODE_OP_BOTTOM3 {
343 0x0: MOV(rAb, Ob);
344 0x1: MOV(rAv, Ov);
345 0x2: MOV(Ob, rAb);
346 0x3: MOV(Ov, rAv);
347 0x4: StringInst::MOVS(Yb,Xb);
348 0x5: StringInst::MOVS(Yv,Xv);
349 0x6: StringTestInst::CMPS(Yb,Xb);
350 0x7: StringTestInst::CMPS(Yv,Xv);
351 }
352 0x15: decode OPCODE_OP_BOTTOM3 {
353 0x0: TEST(rAb,Ib);
354 0x1: TEST(rAv,Iz);
355 0x2: StringInst::STOS(Yb);
356 0x3: StringInst::STOS(Yv);
357 0x4: StringInst::LODS(Xb);
358 0x5: StringInst::LODS(Xv);
359 0x6: StringTestInst::SCAS(Yb);
360 0x7: StringTestInst::SCAS(Yv);
361 }
362 0x16: MOV(Bb,Ib);
363 0x17: MOV(Bv,Iv);
364 0x18: decode OPCODE_OP_BOTTOM3 {
365 //0x0: group2_Eb_Ib();
366 0x0: decode MODRM_REG {
367 0x0: ROL(Eb,Ib);
368 0x1: ROR(Eb,Ib);
369 0x2: RCL(Eb,Ib);
370 0x3: RCR(Eb,Ib);
371 0x4: SAL(Eb,Ib);
372 0x5: SHR(Eb,Ib);
373 0x6: SAL(Eb,Ib);
374 0x7: SAR(Eb,Ib);
375 }
376 //0x1: group2_Ev_Ib();
377 0x1: decode MODRM_REG {
378 0x0: ROL(Ev,Ib);
379 0x1: ROR(Ev,Ib);
380 0x2: RCL(Ev,Ib);
381 0x3: RCR(Ev,Ib);
382 0x4: SAL(Ev,Ib);
383 0x5: SHR(Ev,Ib);
384 0x6: SAL(Ev,Ib);
385 0x7: SAR(Ev,Ib);
386 }
387 0x2: RET_NEAR(Iw);
388 0x3: RET_NEAR();
389 0x4: decode MODE_SUBMODE {
390 0x0: UD2();
391 default: WarnUnimpl::les_Gz_Mp();
392 }
393 0x5: decode MODE_SUBMODE {
394 0x0: UD2();
395 default: WarnUnimpl::lds_Gz_Mp();
396 }
397 //0x6: group12_Eb_Ib();
398 0x6: decode MODRM_REG {
399 0x0: MOV(Eb,Ib);
400 default: UD2();
401 }
402 //0x7: group12_Ev_Iz();
403 0x7: decode MODRM_REG {
404 0x0: MOV(Ev,Iz);
405 default: UD2();
406 }
407 }
408 format WarnUnimpl {
409 0x19: decode OPCODE_OP_BOTTOM3 {
410 // The second parameter here should be of size b, but
411 // immediate sizes are determined elsewhere and this would
412 // confuse the instruction type specialization code.
413 0x0: Inst::ENTER(Iw,Iw);
414 0x1: Inst::LEAVE();
415 0x2: ret_far_Iw();
416 0x3: decode MODE_SUBMODE {
417 0x3, 0x4: ret_far_real();
418 default: Inst::RET_FAR();
419 }
420 0x4: int3();
421#if FULL_SYSTEM
422 0x5: int_Ib();
423#else
424 // Really only the LSB matters, but the predecoder will sign
425 // extend it, and there's no easy way to specify only checking
426 // the first byte.
427 0x5: decode IMMEDIATE {
428 0xffffffffffffff80:
429 SyscallInst::int80('xc->syscall(Rax)', IsSyscall);
430 default: int_Ib();
431 }
432#endif
433 0x6: decode MODE_SUBMODE {
434 0x0: Inst::UD2();
435 default: into();
436 }
437 0x7: decode MODE_SUBMODE {
438 0x4: Inst::IRET_REAL();
439 0x3: Inst::IRET_VIRT();
440 default: Inst::IRET_PROT();
441 }
442 }
443 }
444 0x1A: decode OPCODE_OP_BOTTOM3 {
445 //0x0: group2_Eb_1();
446 0x0: decode MODRM_REG {
447 0x0: ROL_1(Eb);
448 0x1: ROR_1(Eb);
449 0x2: RCL_1(Eb);
450 0x3: RCR_1(Eb);
451 0x4: SAL_1(Eb);
452 0x5: SHR_1(Eb);
453 0x6: SAL_1(Eb);
454 0x7: SAR_1(Eb);
455 }
456 //0x1: group2_Ev_1();
457 0x1: decode MODRM_REG {
458 0x0: ROL_1(Ev);
459 0x1: ROR_1(Ev);
460 0x2: RCL_1(Ev);
461 0x3: RCR_1(Ev);
462 0x4: SAL_1(Ev);
463 0x5: SHR_1(Ev);
464 0x6: SAL_1(Ev);
465 0x7: SAR_1(Ev);
466 }
467 //0x2: group2_Eb_Cl();
468 0x2: decode MODRM_REG {
469 0x0: ROL(Eb,rCb);
470 0x1: ROR(Eb,rCb);
471 0x2: RCL(Eb,rCb);
472 0x3: RCR(Eb,rCb);
473 0x4: SAL(Eb,rCb);
474 0x5: SHR(Eb,rCb);
475 0x6: SAL(Eb,rCb);
476 0x7: SAR(Eb,rCb);
477 }
478 //The second operand should have size "b", but to have
479 //consistent register sizes it's "v". This shouldn't have
480 //any affect on functionality.
481 //0x3: group2_Ev_Cl();
482 0x3: decode MODRM_REG {
483 0x0: ROL(Ev,rCv);
484 0x1: ROR(Ev,rCv);
485 0x2: RCL(Ev,rCv);
486 0x3: RCR(Ev,rCv);
487 0x4: SAL(Ev,rCv);
488 0x5: SHR(Ev,rCv);
489 0x6: SAL(Ev,rCv);
490 0x7: SAR(Ev,rCv);
491 }
492 0x4: decode MODE_SUBMODE {
493 0x0: UD2();
494 default: WarnUnimpl::aam_Ib();
495 }
496 0x5: decode MODE_SUBMODE {
497 0x0: UD2();
498 default: WarnUnimpl::aad_Ib();
499 }
500 0x6: decode MODE_SUBMODE {
501 0x0: UD2();
502 default: SALC(rAb);
503 }
504 0x7: XLAT();
505 }
506 ##include "x87.isa"
507 0x1C: decode OPCODE_OP_BOTTOM3 {
508 0x0: LOOPNE(Jb);
509 0x1: LOOPE(Jb);
510 0x2: LOOP(Jb);
511 0x3: JRCX(Jb);
512 0x4: IN(rAb,Ib);
513 0x5: IN(rAv,Iv);
514 0x6: OUT(Ib,rAb);
515 0x7: OUT(Iv,rAv);
516 }
517 0x1D: decode OPCODE_OP_BOTTOM3 {
518 0x0: CALL_NEAR(Jz);
519 0x1: JMP(Jz);
520 0x2: decode MODE_SUBMODE {
521 0x0: UD2();
| 1// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
2// All rights reserved.
3//
4// Redistribution and use of this software in source and binary forms,
5// with or without modification, are permitted provided that the
6// following conditions are met:
7//
8// The software must be used only for Non-Commercial Use which means any
9// use which is NOT directed to receiving any direct monetary
10// compensation for, or commercial advantage from such use. Illustrative
11// examples of non-commercial use are academic research, personal study,
12// teaching, education and corporate research & development.
13// Illustrative examples of commercial use are distributing products for
14// commercial advantage and providing services using the software for
15// commercial advantage.
16//
17// If you wish to use this software or functionality therein that may be
18// covered by patents for commercial use, please contact:
19// Director of Intellectual Property Licensing
20// Office of Strategy and Technology
21// Hewlett-Packard Company
22// 1501 Page Mill Road
23// Palo Alto, California 94304
24//
25// Redistributions of source code must retain the above copyright notice,
26// this list of conditions and the following disclaimer. Redistributions
27// in binary form must reproduce the above copyright notice, this list of
28// conditions and the following disclaimer in the documentation and/or
29// other materials provided with the distribution. Neither the name of
30// the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its
31// contributors may be used to endorse or promote products derived from
32// this software without specific prior written permission. No right of
33// sublicense is granted herewith. Derivatives of the software and
34// output created using the software may be prepared, but only for
35// Non-Commercial Uses. Derivatives of the software may be shared with
36// others provided: (i) the others agree to abide by the list of
37// conditions herein which includes the Non-Commercial Use restrictions;
38// and (ii) such Derivatives of the software include the above copyright
39// notice to acknowledge the contribution from this software where
40// applicable, this list of conditions and the disclaimer below.
41//
42// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
43// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
44// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
45// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
46// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
47// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
48// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53//
54// Authors: Gabe Black
55
56////////////////////////////////////////////////////////////////////
57//
58// Decode the one byte opcodes
59//
60
610x1: decode OPCODE_OP_TOP5 {
62 format Inst {
63 0x00: decode OPCODE_OP_BOTTOM3 {
64 0x6: decode MODE_SUBMODE {
65 0x0: UD2();
66 default: WarnUnimpl::push_ES();
67 }
68 0x7: decode MODE_SUBMODE {
69 0x0: UD2();
70 default: WarnUnimpl::pop_ES();
71 }
72 default: MultiInst::ADD(OPCODE_OP_BOTTOM3,
73 [Eb,Gb], [Ev,Gv],
74 [Gb,Eb], [Gv,Ev],
75 [rAb,Ib], [rAv,Iz]);
76 }
77 0x01: decode OPCODE_OP_BOTTOM3 {
78 0x6: decode MODE_SUBMODE {
79 0x0: UD2();
80 default: WarnUnimpl::push_CS();
81 }
82 //Any time this is seen, it should generate a two byte opcode
83 0x7: M5InternalError::error(
84 {{"Saw a one byte opcode whose value was 0x0F!"}});
85 default: MultiInst::OR(OPCODE_OP_BOTTOM3,
86 [Eb,Gb], [Ev,Gv],
87 [Gb,Eb], [Gv,Ev],
88 [rAb,Ib], [rAv,Iz]);
89 }
90 0x02: decode OPCODE_OP_BOTTOM3 {
91 0x6: decode MODE_SUBMODE {
92 0x0: UD2();
93 default: WarnUnimpl::push_SS();
94 }
95 0x7: decode MODE_SUBMODE {
96 0x0: UD2();
97 default: WarnUnimpl::pop_SS();
98 }
99 default: MultiInst::ADC(OPCODE_OP_BOTTOM3,
100 [Eb,Gb], [Ev,Gv],
101 [Gb,Eb], [Gv,Ev],
102 [rAb,Ib], [rAv,Iz]);
103 }
104 0x03: decode OPCODE_OP_BOTTOM3 {
105 0x6: decode MODE_SUBMODE {
106 0x0: UD2();
107 default: WarnUnimpl::push_DS();
108 }
109 0x7: decode MODE_SUBMODE {
110 0x0: UD2();
111 default: WarnUnimpl::pop_DS();
112 }
113 default: MultiInst::SBB(OPCODE_OP_BOTTOM3,
114 [Eb,Gb], [Ev,Gv],
115 [Gb,Eb], [Gv,Ev],
116 [rAb,Ib], [rAv,Iz]);
117 }
118 0x04: decode OPCODE_OP_BOTTOM3 {
119 0x6: M5InternalError::error(
120 {{"Tried to execute the ES segment override prefix!"}});
121 0x7: decode MODE_SUBMODE {
122 0x0: UD2();
123 default: WarnUnimpl::daa();
124 }
125 default: MultiInst::AND(OPCODE_OP_BOTTOM3,
126 [Eb,Gb], [Ev,Gv],
127 [Gb,Eb], [Gv,Ev],
128 [rAb,Ib], [rAv,Iz]);
129 }
130 0x05: decode OPCODE_OP_BOTTOM3 {
131 0x6: M5InternalError::error(
132 {{"Tried to execute the CS segment override prefix!"}});
133 0x7: decode MODE_SUBMODE {
134 0x0: UD2();
135 default: WarnUnimpl::das();
136 }
137 default: MultiInst::SUB(OPCODE_OP_BOTTOM3,
138 [Eb,Gb], [Ev,Gv],
139 [Gb,Eb], [Gv,Ev],
140 [rAb,Ib], [rAv,Iz]);
141 }
142 0x06: decode OPCODE_OP_BOTTOM3 {
143 0x6: M5InternalError::error(
144 {{"Tried to execute the SS segment override prefix!"}});
145 0x7: decode MODE_SUBMODE {
146 0x0: UD2();
147 default: WarnUnimpl::aaa();
148 }
149 default: MultiInst::XOR(OPCODE_OP_BOTTOM3,
150 [Eb,Gb], [Ev,Gv],
151 [Gb,Eb], [Gv,Ev],
152 [rAb,Ib], [rAv,Iz]);
153 }
154 0x07: decode OPCODE_OP_BOTTOM3 {
155 0x6: M5InternalError::error(
156 {{"Tried to execute the DS segment override prefix!"}});
157 0x7: decode MODE_SUBMODE {
158 0x0: UD2();
159 default: WarnUnimpl::aas();
160 }
161 default: MultiInst::CMP(OPCODE_OP_BOTTOM3,
162 [Eb,Gb], [Ev,Gv],
163 [Gb,Eb], [Gv,Ev],
164 [rAb,Ib], [rAv,Iz]);
165 }
166 0x08: decode MODE_SUBMODE {
167 0x0: M5InternalError::error (
168 {{"Tried to execute an REX prefix!"}});
169 default: INC(Bv);
170 }
171 0x09: decode MODE_SUBMODE {
172 0x0: M5InternalError::error (
173 {{"Tried to execute an REX prefix!"}});
174 default: DEC(Bv);
175 }
176 0x0A: PUSH(Bv);
177 0x0B: POP(Bv);
178 0x0C: decode OPCODE_OP_BOTTOM3 {
179 0x0: decode MODE_SUBMODE {
180 0x0: UD2();
181 default: PUSHA();
182 }
183 0x1: decode MODE_SUBMODE {
184 0x0: UD2();
185 default: POPA();
186 }
187 0x2: decode MODE_SUBMODE {
188 0x0: UD2();
189 default: BOUND(Gv,Mv);
190 }
191 0x3: decode MODE_SUBMODE {
192 //The second operand should really be of size "d", but it's
193 //set to "v" in order to have a consistent register size.
194 //This shouldn't affect behavior.
195 0x0: MOVSXD(Gv,Ev);
196 default: WarnUnimpl::arpl_Ew_Gw();
197 }
198 0x4: M5InternalError::error(
199 {{"Tried to execute the FS segment override prefix!"}});
200 0x5: M5InternalError::error(
201 {{"Tried to execute the GS segment override prefix!"}});
202 0x6: M5InternalError::error(
203 {{"Tried to execute the operand size override prefix!"}});
204 0x7: M5InternalError::error(
205 {{"Tried to execute the DS address size override prefix!"}});
206 }
207 0x0D: decode OPCODE_OP_BOTTOM3 {
208 0x0: PUSH(Iz);
209 0x1: IMUL(Gv,Ev,Iz);
210 0x2: PUSH(Ib);
211 0x3: IMUL(Gv,Ev,Ib);
212 0x4: StringInst::INS(Yb,rD);
213 0x5: StringInst::INS(Yz,rD);
214 0x6: StringInst::OUTS(rD,Xb);
215 0x7: StringInst::OUTS(rD,Xz);
216 }
217 0x0E: decode OPCODE_OP_BOTTOM3 {
218 0x0: JO(Jb);
219 0x1: JNO(Jb);
220 0x2: JB(Jb);
221 0x3: JNB(Jb);
222 0x4: JZ(Jb);
223 0x5: JNZ(Jb);
224 0x6: JBE(Jb);
225 0x7: JNBE(Jb);
226 }
227 0x0F: decode OPCODE_OP_BOTTOM3 {
228 0x0: JS(Jb);
229 0x1: JNS(Jb);
230 0x2: JP(Jb);
231 0x3: JNP(Jb);
232 0x4: JL(Jb);
233 0x5: JNL(Jb);
234 0x6: JLE(Jb);
235 0x7: JNLE(Jb);
236 }
237 0x10: decode OPCODE_OP_BOTTOM3 {
238 //0x0: group1_Eb_Ib();
239 0x0: decode MODRM_REG {
240 0x0: ADD(Eb,Ib);
241 0x1: OR(Eb,Ib);
242 0x2: ADC(Eb,Ib);
243 0x3: SBB(Eb,Ib);
244 0x4: AND(Eb,Ib);
245 0x5: SUB(Eb,Ib);
246 0x6: XOR(Eb,Ib);
247 0x7: CMP(Eb,Ib);
248 }
249 //0x1: group1_Ev_Iz();
250 0x1: decode MODRM_REG {
251 0x0: ADD(Ev,Iz);
252 0x1: OR(Ev,Iz);
253 0x2: ADC(Ev,Iz);
254 0x3: SBB(Ev,Iz);
255 0x4: AND(Ev,Iz);
256 0x5: SUB(Ev,Iz);
257 0x6: XOR(Ev,Iz);
258 0x7: CMP(Ev,Iz);
259 }
260 0x2: decode MODE_SUBMODE {
261 0x0: UD2();
262 //default: group1_Eb_Ib();
263 default: decode MODRM_REG {
264 0x0: ADD(Eb,Ib);
265 0x1: OR(Eb,Ib);
266 0x2: ADC(Eb,Ib);
267 0x3: SBB(Eb,Ib);
268 0x4: AND(Eb,Ib);
269 0x5: SUB(Eb,Ib);
270 0x6: XOR(Eb,Ib);
271 0x7: CMP(Eb,Ib);
272 }
273 }
274 //0x3: group1_Ev_Ib();
275 0x3: decode MODRM_REG {
276 0x0: ADD(Ev,Ib);
277 0x1: OR(Ev,Ib);
278 0x2: ADC(Ev,Ib);
279 0x3: SBB(Ev,Ib);
280 0x4: AND(Ev,Ib);
281 0x5: SUB(Ev,Ib);
282 0x6: XOR(Ev,Ib);
283 0x7: CMP(Ev,Ib);
284 }
285 0x4: TEST(Eb,Gb);
286 0x5: TEST(Ev,Gv);
287 0x6: XCHG(Eb,Gb);
288 0x7: XCHG(Ev,Gv);
289 }
290 0x11: decode OPCODE_OP_BOTTOM3 {
291 0x0: MOV(Eb,Gb);
292 0x1: MOV(Ev,Gv);
293 0x2: MOV(Gb,Eb);
294 0x3: MOV(Gv,Ev);
295 0x4: decode MODRM_REG {
296 0x0, 0x1, 0x2,
297 0x3, 0x4, 0x5: MOV(Ev,Sv);
298 }
299 0x5: LEA(Gv,M);
300 0x6: decode MODE_SUBMODE {
301 0x3, 0x4: MOV_REAL(Sv,Ev);
302 default: decode MODRM_REG {
303 0x1: UD2(); // Moving to the CS selector is illegal.
304 0x2: MOVSS(Sv,Ev);
305 0x0, 0x3,
306 0x4, 0x5: MOV(Sv,Ev);
307 default: UD2();
308 }
309 }
310 //0x7: group10_Ev();
311 0x7: decode MODRM_REG {
312 0x0: POP(Ev);
313 default: UD2();
314 }
315 }
316 0x12: decode OPCODE_OP_BOTTOM3 {
317 0x0: NOP(); //XXX repe makes this a "pause"
318 default: XCHG(Bv,rAv);
319 }
320 0x13: decode OPCODE_OP_BOTTOM3 {
321 0x0: CDQE(rAv);
322 0x1: CQO(rAv,rDv);
323 0x2: decode MODE_SUBMODE {
324 0x0: UD2();
325 default: WarnUnimpl::call_far_Ap();
326 }
327 0x3: WarnUnimpl::fwait(); //aka wait
328 0x4: PUSHF();
329 0x5: POPF();
330 //The 64 bit versions of both of these should be illegal only
331 //if CPUID says it isn't supported. For now, we'll just assume
332 //that it's supported.
333 0x6: decode MODE_SUBMODE {
334 0x0: SAHF_64();
335 default: SAHF();
336 }
337 0x7: decode MODE_SUBMODE {
338 0x0: LAHF_64();
339 default: LAHF();
340 }
341 }
342 0x14: decode OPCODE_OP_BOTTOM3 {
343 0x0: MOV(rAb, Ob);
344 0x1: MOV(rAv, Ov);
345 0x2: MOV(Ob, rAb);
346 0x3: MOV(Ov, rAv);
347 0x4: StringInst::MOVS(Yb,Xb);
348 0x5: StringInst::MOVS(Yv,Xv);
349 0x6: StringTestInst::CMPS(Yb,Xb);
350 0x7: StringTestInst::CMPS(Yv,Xv);
351 }
352 0x15: decode OPCODE_OP_BOTTOM3 {
353 0x0: TEST(rAb,Ib);
354 0x1: TEST(rAv,Iz);
355 0x2: StringInst::STOS(Yb);
356 0x3: StringInst::STOS(Yv);
357 0x4: StringInst::LODS(Xb);
358 0x5: StringInst::LODS(Xv);
359 0x6: StringTestInst::SCAS(Yb);
360 0x7: StringTestInst::SCAS(Yv);
361 }
362 0x16: MOV(Bb,Ib);
363 0x17: MOV(Bv,Iv);
364 0x18: decode OPCODE_OP_BOTTOM3 {
365 //0x0: group2_Eb_Ib();
366 0x0: decode MODRM_REG {
367 0x0: ROL(Eb,Ib);
368 0x1: ROR(Eb,Ib);
369 0x2: RCL(Eb,Ib);
370 0x3: RCR(Eb,Ib);
371 0x4: SAL(Eb,Ib);
372 0x5: SHR(Eb,Ib);
373 0x6: SAL(Eb,Ib);
374 0x7: SAR(Eb,Ib);
375 }
376 //0x1: group2_Ev_Ib();
377 0x1: decode MODRM_REG {
378 0x0: ROL(Ev,Ib);
379 0x1: ROR(Ev,Ib);
380 0x2: RCL(Ev,Ib);
381 0x3: RCR(Ev,Ib);
382 0x4: SAL(Ev,Ib);
383 0x5: SHR(Ev,Ib);
384 0x6: SAL(Ev,Ib);
385 0x7: SAR(Ev,Ib);
386 }
387 0x2: RET_NEAR(Iw);
388 0x3: RET_NEAR();
389 0x4: decode MODE_SUBMODE {
390 0x0: UD2();
391 default: WarnUnimpl::les_Gz_Mp();
392 }
393 0x5: decode MODE_SUBMODE {
394 0x0: UD2();
395 default: WarnUnimpl::lds_Gz_Mp();
396 }
397 //0x6: group12_Eb_Ib();
398 0x6: decode MODRM_REG {
399 0x0: MOV(Eb,Ib);
400 default: UD2();
401 }
402 //0x7: group12_Ev_Iz();
403 0x7: decode MODRM_REG {
404 0x0: MOV(Ev,Iz);
405 default: UD2();
406 }
407 }
408 format WarnUnimpl {
409 0x19: decode OPCODE_OP_BOTTOM3 {
410 // The second parameter here should be of size b, but
411 // immediate sizes are determined elsewhere and this would
412 // confuse the instruction type specialization code.
413 0x0: Inst::ENTER(Iw,Iw);
414 0x1: Inst::LEAVE();
415 0x2: ret_far_Iw();
416 0x3: decode MODE_SUBMODE {
417 0x3, 0x4: ret_far_real();
418 default: Inst::RET_FAR();
419 }
420 0x4: int3();
421#if FULL_SYSTEM
422 0x5: int_Ib();
423#else
424 // Really only the LSB matters, but the predecoder will sign
425 // extend it, and there's no easy way to specify only checking
426 // the first byte.
427 0x5: decode IMMEDIATE {
428 0xffffffffffffff80:
429 SyscallInst::int80('xc->syscall(Rax)', IsSyscall);
430 default: int_Ib();
431 }
432#endif
433 0x6: decode MODE_SUBMODE {
434 0x0: Inst::UD2();
435 default: into();
436 }
437 0x7: decode MODE_SUBMODE {
438 0x4: Inst::IRET_REAL();
439 0x3: Inst::IRET_VIRT();
440 default: Inst::IRET_PROT();
441 }
442 }
443 }
444 0x1A: decode OPCODE_OP_BOTTOM3 {
445 //0x0: group2_Eb_1();
446 0x0: decode MODRM_REG {
447 0x0: ROL_1(Eb);
448 0x1: ROR_1(Eb);
449 0x2: RCL_1(Eb);
450 0x3: RCR_1(Eb);
451 0x4: SAL_1(Eb);
452 0x5: SHR_1(Eb);
453 0x6: SAL_1(Eb);
454 0x7: SAR_1(Eb);
455 }
456 //0x1: group2_Ev_1();
457 0x1: decode MODRM_REG {
458 0x0: ROL_1(Ev);
459 0x1: ROR_1(Ev);
460 0x2: RCL_1(Ev);
461 0x3: RCR_1(Ev);
462 0x4: SAL_1(Ev);
463 0x5: SHR_1(Ev);
464 0x6: SAL_1(Ev);
465 0x7: SAR_1(Ev);
466 }
467 //0x2: group2_Eb_Cl();
468 0x2: decode MODRM_REG {
469 0x0: ROL(Eb,rCb);
470 0x1: ROR(Eb,rCb);
471 0x2: RCL(Eb,rCb);
472 0x3: RCR(Eb,rCb);
473 0x4: SAL(Eb,rCb);
474 0x5: SHR(Eb,rCb);
475 0x6: SAL(Eb,rCb);
476 0x7: SAR(Eb,rCb);
477 }
478 //The second operand should have size "b", but to have
479 //consistent register sizes it's "v". This shouldn't have
480 //any affect on functionality.
481 //0x3: group2_Ev_Cl();
482 0x3: decode MODRM_REG {
483 0x0: ROL(Ev,rCv);
484 0x1: ROR(Ev,rCv);
485 0x2: RCL(Ev,rCv);
486 0x3: RCR(Ev,rCv);
487 0x4: SAL(Ev,rCv);
488 0x5: SHR(Ev,rCv);
489 0x6: SAL(Ev,rCv);
490 0x7: SAR(Ev,rCv);
491 }
492 0x4: decode MODE_SUBMODE {
493 0x0: UD2();
494 default: WarnUnimpl::aam_Ib();
495 }
496 0x5: decode MODE_SUBMODE {
497 0x0: UD2();
498 default: WarnUnimpl::aad_Ib();
499 }
500 0x6: decode MODE_SUBMODE {
501 0x0: UD2();
502 default: SALC(rAb);
503 }
504 0x7: XLAT();
505 }
506 ##include "x87.isa"
507 0x1C: decode OPCODE_OP_BOTTOM3 {
508 0x0: LOOPNE(Jb);
509 0x1: LOOPE(Jb);
510 0x2: LOOP(Jb);
511 0x3: JRCX(Jb);
512 0x4: IN(rAb,Ib);
513 0x5: IN(rAv,Iv);
514 0x6: OUT(Ib,rAb);
515 0x7: OUT(Iv,rAv);
516 }
517 0x1D: decode OPCODE_OP_BOTTOM3 {
518 0x0: CALL_NEAR(Jz);
519 0x1: JMP(Jz);
520 0x2: decode MODE_SUBMODE {
521 0x0: UD2();
|