1/*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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33
34#include <iostream>
35#include <string>
36
37#include "arch/x86/regs/float.hh"
38#include "arch/x86/regs/misc.hh"
39#include "arch/x86/registers.hh"
40#include "base/types.hh"
41#include "sim/sim_object.hh"
42
43class Checkpoint;
44class EventManager;
45class ThreadContext;
46struct X86ISAParams;
47
48namespace X86ISA
49{
48 class ISA
50 class ISA : public SimObject
51 {
52 protected:
53 MiscReg regVal[NUM_MISCREGS];
54 void updateHandyM5Reg(Efer efer, CR0 cr0,
55 SegAttr csAttr, SegAttr ssAttr, RFLAGS rflags,
56 ThreadContext *tc);
57
58 public:
59 typedef X86ISAParams Params;
60
61 void clear();
62
59 ISA()
60 {
61 clear();
62 }
63 ISA(Params *p);
64 const Params *params() const;
65
66 MiscReg readMiscRegNoEffect(int miscReg);
67 MiscReg readMiscReg(int miscReg, ThreadContext *tc);
68
69 void setMiscRegNoEffect(int miscReg, MiscReg val);
70 void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc);
71
72 int

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