isa.cc (12406:86bde4a026b5) isa.cc (12692:1eaaa1d75080)
1/*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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140{
141 if (miscReg == MISCREG_TSC) {
142 return regVal[MISCREG_TSC] + tc->getCpuPtr()->curCycle();
143 }
144
145 if (miscReg == MISCREG_FSW) {
146 MiscReg fsw = regVal[MISCREG_FSW];
147 MiscReg top = regVal[MISCREG_X87_TOP];
1/*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 131 unchanged lines hidden (view full) ---

140{
141 if (miscReg == MISCREG_TSC) {
142 return regVal[MISCREG_TSC] + tc->getCpuPtr()->curCycle();
143 }
144
145 if (miscReg == MISCREG_FSW) {
146 MiscReg fsw = regVal[MISCREG_FSW];
147 MiscReg top = regVal[MISCREG_X87_TOP];
148 return insertBits(fsw, 11, 13, top);
148 return insertBits(fsw, 13, 11, top);
149 }
150
151 return readMiscRegNoEffect(miscReg);
152}
153
154void
155ISA::setMiscRegNoEffect(int miscReg, MiscReg val)
156{

--- 271 unchanged lines hidden --- 		149 }
150
151 return readMiscRegNoEffect(miscReg);
152}
153
154void
155ISA::setMiscRegNoEffect(int miscReg, MiscReg val)
156{

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