isa.cc (6336:25635830e33c) | isa.cc (6359:1e4908b3e28e) |
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1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 14 unchanged lines hidden (view full) --- 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 | 1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 14 unchanged lines hidden (view full) --- 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 |
31#include "arch/x86/floatregs.hh" | |
32#include "arch/x86/isa.hh" 33#include "arch/x86/tlb.hh" 34#include "cpu/base.hh" 35#include "cpu/thread_context.hh" 36#include "sim/serialize.hh" 37 38namespace X86ISA 39{ --- 310 unchanged lines hidden (view full) --- 350 351void 352ISA::unserialize(EventManager *em, Checkpoint * cp, 353 const std::string & section) 354{ 355 UNSERIALIZE_ARRAY(regVal, NumMiscRegs); 356} 357 | 31#include "arch/x86/isa.hh" 32#include "arch/x86/tlb.hh" 33#include "cpu/base.hh" 34#include "cpu/thread_context.hh" 35#include "sim/serialize.hh" 36 37namespace X86ISA 38{ --- 310 unchanged lines hidden (view full) --- 349 350void 351ISA::unserialize(EventManager *em, Checkpoint * cp, 352 const std::string & section) 353{ 354 UNSERIALIZE_ARRAY(regVal, NumMiscRegs); 355} 356 |
358int 359ISA::flattenIntIndex(int reg) 360{ 361 //If we need to fold over the index to match byte semantics, do that. 362 //Otherwise, just strip off any extra bits and pass it through. 363 if (reg & (1 << 6)) 364 return (reg & (~(1 << 6) - 0x4)); 365 else 366 return (reg & ~(1 << 6)); | |
367} | 357} |
368 369int 370ISA::flattenFloatIndex(int reg) 371{ 372 if (reg >= NUM_FLOATREGS) { 373 int top = readMiscRegNoEffect(MISCREG_X87_TOP); 374 reg = FLOATREG_STACK(reg - NUM_FLOATREGS, top); 375 } 376 return reg; 377} 378 379} | |