interrupts.hh (9554:406fbcf60223) interrupts.hh (9805:a4339e26b429)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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87 Bitfield<15> trigger;
88 Bitfield<16> masked;
89 Bitfield<17> periodic;
90 EndBitUnion(LVTEntry)
91
92 /*
93 * Timing related stuff.
94 */
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 78 unchanged lines hidden (view full) ---

87 Bitfield<15> trigger;
88 Bitfield<16> masked;
89 Bitfield<17> periodic;
90 EndBitUnion(LVTEntry)
91
92 /*
93 * Timing related stuff.
94 */
95 Tick latency;
96
97 class ApicTimerEvent : public Event
98 {
99 private:
100 Interrupts *localApic;
101 public:
102 ApicTimerEvent(Interrupts *_localApic) :
103 Event(), localApic(_localApic)
104 {}

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228 triggerTimerInterrupt()
229 {
230 LVTEntry entry = regs[APIC_LVT_TIMER];
231 if (!entry.masked)
232 requestInterrupt(entry.vector, entry.deliveryMode, entry.trigger);
233 return entry.periodic;
234 }
235
95 class ApicTimerEvent : public Event
96 {
97 private:
98 Interrupts *localApic;
99 public:
100 ApicTimerEvent(Interrupts *_localApic) :
101 Event(), localApic(_localApic)
102 {}

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226 triggerTimerInterrupt()
227 {
228 LVTEntry entry = regs[APIC_LVT_TIMER];
229 if (!entry.masked)
230 requestInterrupt(entry.vector, entry.deliveryMode, entry.trigger);
231 return entry.periodic;
232 }
233
236 AddrRangeList getAddrRanges() const;
237 AddrRangeList getIntAddrRange() const;
238
239 BaseMasterPort &getMasterPort(const std::string &if_name,
240 PortID idx = InvalidPortID)
241 {
242 if (if_name == "int_master") {
243 return intMasterPort;
244 }

--- 71 unchanged lines hidden --- 		234 AddrRangeList getIntAddrRange() const;
235
236 BaseMasterPort &getMasterPort(const std::string &if_name,
237 PortID idx = InvalidPortID)
238 {
239 if (if_name == "int_master") {
240 return intMasterPort;
241 }

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