interrupts.hh (10112:1a2f64842044) | interrupts.hh (10541:9f100bac04f1) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 166 unchanged lines hidden (view full) --- 175 clearRegArrayBit(ApicRegIndex base, uint8_t vector) 176 { 177 regs[base + (vector / 32)] &= ~(1 << (vector % 32)); 178 } 179 180 bool 181 getRegArrayBit(ApicRegIndex base, uint8_t vector) 182 { | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 166 unchanged lines hidden (view full) --- 175 clearRegArrayBit(ApicRegIndex base, uint8_t vector) 176 { 177 regs[base + (vector / 32)] &= ~(1 << (vector % 32)); 178 } 179 180 bool 181 getRegArrayBit(ApicRegIndex base, uint8_t vector) 182 { |
183 return bits(regs[base + (vector / 32)], vector % 5); | 183 return bits(regs[base + (vector / 32)], vector % 32); |
184 } 185 186 void requestInterrupt(uint8_t vector, uint8_t deliveryMode, bool level); 187 188 BaseCPU *cpu; 189 190 int initialApicId; 191 --- 134 unchanged lines hidden --- | 184 } 185 186 void requestInterrupt(uint8_t vector, uint8_t deliveryMode, bool level); 187 188 BaseCPU *cpu; 189 190 int initialApicId; 191 --- 134 unchanged lines hidden --- |