1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * 9 * The software must be used only for Non-Commercial Use which means any 10 * use which is NOT directed to receiving any direct monetary 11 * compensation for, or commercial advantage from such use. Illustrative 12 * examples of non-commercial use are academic research, personal study, 13 * teaching, education and corporate research & development. 14 * Illustrative examples of commercial use are distributing products for 15 * commercial advantage and providing services using the software for 16 * commercial advantage. 17 * 18 * If you wish to use this software or functionality therein that may be 19 * covered by patents for commercial use, please contact: 20 * Director of Intellectual Property Licensing 21 * Office of Strategy and Technology 22 * Hewlett-Packard Company 23 * 1501 Page Mill Road 24 * Palo Alto, California 94304 25 * 26 * Redistributions of source code must retain the above copyright notice, 27 * this list of conditions and the following disclaimer. Redistributions 28 * in binary form must reproduce the above copyright notice, this list of 29 * conditions and the following disclaimer in the documentation and/or 30 * other materials provided with the distribution. Neither the name of 31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 32 * contributors may be used to endorse or promote products derived from 33 * this software without specific prior written permission. No right of 34 * sublicense is granted herewith. Derivatives of the software and 35 * output created using the software may be prepared, but only for 36 * Non-Commercial Uses. Derivatives of the software may be shared with 37 * others provided: (i) the others agree to abide by the list of 38 * conditions herein which includes the Non-Commercial Use restrictions; 39 * and (ii) such Derivatives of the software include the above copyright 40 * notice to acknowledge the contribution from this software where 41 * applicable, this list of conditions and the disclaimer below. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_INTERRUPTS_HH__ 59#define __ARCH_X86_INTERRUPTS_HH__ 60 61#include "arch/x86/apicregs.hh" 62#include "arch/x86/faults.hh"
| 1/* 2 * Copyright (c) 2007 The Hewlett-Packard Development Company 3 * All rights reserved. 4 * 5 * Redistribution and use of this software in source and binary forms, 6 * with or without modification, are permitted provided that the 7 * following conditions are met: 8 * 9 * The software must be used only for Non-Commercial Use which means any 10 * use which is NOT directed to receiving any direct monetary 11 * compensation for, or commercial advantage from such use. Illustrative 12 * examples of non-commercial use are academic research, personal study, 13 * teaching, education and corporate research & development. 14 * Illustrative examples of commercial use are distributing products for 15 * commercial advantage and providing services using the software for 16 * commercial advantage. 17 * 18 * If you wish to use this software or functionality therein that may be 19 * covered by patents for commercial use, please contact: 20 * Director of Intellectual Property Licensing 21 * Office of Strategy and Technology 22 * Hewlett-Packard Company 23 * 1501 Page Mill Road 24 * Palo Alto, California 94304 25 * 26 * Redistributions of source code must retain the above copyright notice, 27 * this list of conditions and the following disclaimer. Redistributions 28 * in binary form must reproduce the above copyright notice, this list of 29 * conditions and the following disclaimer in the documentation and/or 30 * other materials provided with the distribution. Neither the name of 31 * the COPYRIGHT HOLDER(s), HEWLETT-PACKARD COMPANY, nor the names of its 32 * contributors may be used to endorse or promote products derived from 33 * this software without specific prior written permission. No right of 34 * sublicense is granted herewith. Derivatives of the software and 35 * output created using the software may be prepared, but only for 36 * Non-Commercial Uses. Derivatives of the software may be shared with 37 * others provided: (i) the others agree to abide by the list of 38 * conditions herein which includes the Non-Commercial Use restrictions; 39 * and (ii) such Derivatives of the software include the above copyright 40 * notice to acknowledge the contribution from this software where 41 * applicable, this list of conditions and the disclaimer below. 42 * 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 46 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 47 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 49 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 53 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 * 55 * Authors: Gabe Black 56 */ 57 58#ifndef __ARCH_X86_INTERRUPTS_HH__ 59#define __ARCH_X86_INTERRUPTS_HH__ 60 61#include "arch/x86/apicregs.hh" 62#include "arch/x86/faults.hh"
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| 63#include "base/bitfield.hh"
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63#include "cpu/thread_context.hh" 64#include "dev/io_device.hh" 65#include "dev/x86/intdev.hh" 66#include "params/X86LocalApic.hh" 67#include "sim/eventq.hh" 68 69class ThreadContext; 70 71namespace X86ISA 72{ 73 74class Interrupts : public BasicPioDevice, IntDev 75{ 76 protected:
| 64#include "cpu/thread_context.hh" 65#include "dev/io_device.hh" 66#include "dev/x86/intdev.hh" 67#include "params/X86LocalApic.hh" 68#include "sim/eventq.hh" 69 70class ThreadContext; 71 72namespace X86ISA 73{ 74 75class Interrupts : public BasicPioDevice, IntDev 76{ 77 protected:
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| 78 // Storage for the APIC registers
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77 uint32_t regs[NUM_APIC_REGS];
| 79 uint32_t regs[NUM_APIC_REGS];
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| 80 81 /* 82 * Timing related stuff. 83 */
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78 Tick latency; 79 Tick clock; 80 81 class ApicTimerEvent : public Event 82 { 83 public: 84 ApicTimerEvent() : Event() 85 {} 86 87 void process() 88 { 89 warn("Local APIC timer event doesn't do anything!\n"); 90 } 91 }; 92 93 ApicTimerEvent apicTimerEvent; 94
| 84 Tick latency; 85 Tick clock; 86 87 class ApicTimerEvent : public Event 88 { 89 public: 90 ApicTimerEvent() : Event() 91 {} 92 93 void process() 94 { 95 warn("Local APIC timer event doesn't do anything!\n"); 96 } 97 }; 98 99 ApicTimerEvent apicTimerEvent; 100
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| 101 /* 102 * IRR and ISR maintenance. 103 */ 104 uint8_t IRRV; 105 uint8_t ISRV; 106 107 int 108 findRegArrayMSB(ApicRegIndex base) 109 { 110 int offset = 7; 111 do { 112 if (regs[base + offset] != 0) { 113 return offset * 32 + findMsbSet(regs[base + offset]); 114 } 115 } while (offset--); 116 return 0; 117 } 118 119 void 120 updateIRRV() 121 { 122 IRRV = findRegArrayMSB(APIC_INTERRUPT_REQUEST_BASE); 123 } 124 125 void 126 updateISRV() 127 { 128 ISRV = findRegArrayMSB(APIC_IN_SERVICE_BASE); 129 } 130 131 void 132 setRegArrayBit(ApicRegIndex base, uint8_t vector) 133 { 134 regs[base + (vector % 32)] |= (1 << (vector >> 5)); 135 } 136 137 void 138 clearRegArrayBit(ApicRegIndex base, uint8_t vector) 139 { 140 regs[base + (vector % 32)] &= ~(1 << (vector >> 5)); 141 } 142 143 bool 144 getRegArrayBit(ApicRegIndex base, uint8_t vector) 145 { 146 return bits(regs[base + (vector % 32)], vector >> 5); 147 } 148
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95 public:
| 149 public:
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| 150 /* 151 * Params stuff. 152 */
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96 typedef X86LocalApicParams Params; 97 98 void setClock(Tick newClock) 99 { 100 clock = newClock; 101 } 102 103 const Params * 104 params() const 105 { 106 return dynamic_cast<const Params *>(_params); 107 } 108
| 153 typedef X86LocalApicParams Params; 154 155 void setClock(Tick newClock) 156 { 157 clock = newClock; 158 } 159 160 const Params * 161 params() const 162 { 163 return dynamic_cast<const Params *>(_params); 164 } 165
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| 166 /* 167 * Functions to interact with the interrupt port from IntDev. 168 */
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109 Tick read(PacketPtr pkt); 110 Tick write(PacketPtr pkt); 111 Tick recvMessage(PacketPtr pkt); 112 113 void addressRanges(AddrRangeList &range_list) 114 { 115 range_list.clear(); 116 range_list.push_back(RangeEx(x86LocalAPICAddress(0, 0), 117 x86LocalAPICAddress(0, 0) + PageBytes)); 118 } 119 120 void getIntAddrRange(AddrRangeList &range_list) 121 { 122 range_list.clear(); 123 range_list.push_back(RangeEx(x86InterruptAddress(0, 0), 124 x86InterruptAddress(0, 0) + PhysAddrAPICRangeSize)); 125 } 126
| 169 Tick read(PacketPtr pkt); 170 Tick write(PacketPtr pkt); 171 Tick recvMessage(PacketPtr pkt); 172 173 void addressRanges(AddrRangeList &range_list) 174 { 175 range_list.clear(); 176 range_list.push_back(RangeEx(x86LocalAPICAddress(0, 0), 177 x86LocalAPICAddress(0, 0) + PageBytes)); 178 } 179 180 void getIntAddrRange(AddrRangeList &range_list) 181 { 182 range_list.clear(); 183 range_list.push_back(RangeEx(x86InterruptAddress(0, 0), 184 x86InterruptAddress(0, 0) + PhysAddrAPICRangeSize)); 185 } 186
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| 187 Port *getPort(const std::string &if_name, int idx = -1) 188 { 189 if (if_name == "int_port") 190 return intPort; 191 return BasicPioDevice::getPort(if_name, idx); 192 } 193 194 /* 195 * Functions to access and manipulate the APIC's registers. 196 */ 197
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127 uint32_t readReg(ApicRegIndex miscReg); 128 void setReg(ApicRegIndex reg, uint32_t val); 129 void setRegNoEffect(ApicRegIndex reg, uint32_t val) 130 { 131 regs[reg] = val; 132 } 133
| 198 uint32_t readReg(ApicRegIndex miscReg); 199 void setReg(ApicRegIndex reg, uint32_t val); 200 void setRegNoEffect(ApicRegIndex reg, uint32_t val) 201 { 202 regs[reg] = val; 203 } 204
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| 205 /* 206 * Constructor. 207 */ 208
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134 Interrupts(Params * p) : BasicPioDevice(p), IntDev(this), 135 latency(p->pio_latency), clock(0) 136 { 137 pioSize = PageBytes;
| 209 Interrupts(Params * p) : BasicPioDevice(p), IntDev(this), 210 latency(p->pio_latency), clock(0) 211 { 212 pioSize = PageBytes;
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| 213 memset(regs, 0, sizeof(regs));
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138 //Set the local apic DFR to the flat model. 139 regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
| 214 //Set the local apic DFR to the flat model. 215 regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
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140 memset(regs, 0, sizeof(regs)); 141 clear_all();
| 216 ISRV = 0; 217 IRRV = 0;
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142 } 143
| 218 } 219
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144 Port *getPort(const std::string &if_name, int idx = -1)
| 220 /* 221 * Functions for retrieving interrupts for the CPU to handle. 222 */ 223 224 bool check_interrupts(ThreadContext * tc) const; 225 Fault getInterrupt(ThreadContext * tc); 226 void updateIntrInfo(ThreadContext * tc); 227 228 /* 229 * Serialization. 230 */ 231 232 void serialize(std::ostream & os)
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145 {
| 233 {
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146 if (if_name == "int_port") 147 return intPort; 148 return BasicPioDevice::getPort(if_name, idx);
| 234 panic("Interrupts::serialize unimplemented!\n");
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149 } 150
| 235 } 236
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151 int InterruptLevel(uint64_t softint)
| 237 void unserialize(Checkpoint * cp, const std::string & section)
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152 {
| 238 {
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153 panic("Interrupts::InterruptLevel unimplemented!\n"); 154 return 0;
| 239 panic("Interrupts::unserialize unimplemented!\n");
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155 } 156
| 240 } 241
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| 242 /* 243 * Old functions needed for compatability but which will be phased out 244 * eventually. 245 */
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157 void post(int int_num, int index) 158 { 159 panic("Interrupts::post unimplemented!\n"); 160 } 161 162 void clear(int int_num, int index) 163 {
| 246 void post(int int_num, int index) 247 { 248 panic("Interrupts::post unimplemented!\n"); 249 } 250 251 void clear(int int_num, int index) 252 {
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164 warn("Interrupts::clear unimplemented!\n");
| 253 panic("Interrupts::clear unimplemented!\n");
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165 } 166 167 void clear_all() 168 {
| 254 } 255 256 void clear_all() 257 {
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169 warn("Interrupts::clear_all unimplemented!\n");
| 258 panic("Interrupts::clear_all unimplemented!\n");
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170 }
| 259 }
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171 172 bool check_interrupts(ThreadContext * tc) const 173 { 174 return false; 175 } 176 177 Fault getInterrupt(ThreadContext * tc) 178 { 179 return NoFault; 180 } 181 182 void updateIntrInfo(ThreadContext * tc) 183 { 184 panic("Interrupts::updateIntrInfo unimplemented!\n"); 185 } 186 187 void serialize(std::ostream & os) 188 { 189 panic("Interrupts::serialize unimplemented!\n"); 190 } 191 192 void unserialize(Checkpoint * cp, const std::string & section) 193 { 194 panic("Interrupts::unserialize unimplemented!\n"); 195 }
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196}; 197 198}; 199 200#endif // __ARCH_X86_INTERRUPTS_HH__
| 260}; 261 262}; 263 264#endif // __ARCH_X86_INTERRUPTS_HH__
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