interrupts.cc (8768:314eb1e2fa94) interrupts.cc (8781:dc1bc37bfb00)
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#include "arch/x86/regs/apic.hh"
41#include "arch/x86/interrupts.hh"
42#include "arch/x86/intmessage.hh"
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#include "arch/x86/regs/apic.hh"
41#include "arch/x86/interrupts.hh"
42#include "arch/x86/intmessage.hh"
43#include "config/full_system.hh"
44#include "cpu/base.hh"
45#include "debug/LocalApic.hh"
46#include "dev/x86/i82094aa.hh"
47#include "dev/x86/pc.hh"
48#include "dev/x86/south_bridge.hh"
49#include "mem/packet_access.hh"
50#include "sim/system.hh"
43#include "cpu/base.hh"
44#include "debug/LocalApic.hh"
45#include "dev/x86/i82094aa.hh"
46#include "dev/x86/pc.hh"
47#include "dev/x86/south_bridge.hh"
48#include "mem/packet_access.hh"
49#include "sim/system.hh"
50#include "sim/full_system.hh"
51
52int
53divideFromConf(uint32_t conf)
54{
55 // This figures out what division we want from the division configuration
56 // register in the local APIC. The encoding is a little odd but it can
57 // be deciphered fairly easily.
58 int shift = ((conf & 0x8) >> 1) | (conf & 0x3);

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270 pendingUnmaskableInt = pendingInit = true;
271 initVector = vector;
272 } else if (deliveryMode == DeliveryMode::SIPI &&
273 !pendingStartup && !startedUp) {
274 pendingUnmaskableInt = pendingStartup = true;
275 startupVector = vector;
276 }
277 }
51
52int
53divideFromConf(uint32_t conf)
54{
55 // This figures out what division we want from the division configuration
56 // register in the local APIC. The encoding is a little odd but it can
57 // be deciphered fairly easily.
58 int shift = ((conf & 0x8) >> 1) | (conf & 0x3);

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270 pendingUnmaskableInt = pendingInit = true;
271 initVector = vector;
272 } else if (deliveryMode == DeliveryMode::SIPI &&
273 !pendingStartup && !startedUp) {
274 pendingUnmaskableInt = pendingStartup = true;
275 startupVector = vector;
276 }
277 }
278#if FULL_SYSTEM //XXX CPU has no wakeup method in SE mode.
279 cpu->wakeup();
280#endif
278 if (FullSystem)
279 cpu->wakeup();
281}
282
283
284void
285X86ISA::Interrupts::setCPU(BaseCPU * newCPU)
286{
287 assert(newCPU);
288 if (cpu != NULL && cpu->cpuId() != newCPU->cpuId()) {

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281
282
283void
284X86ISA::Interrupts::setCPU(BaseCPU * newCPU)
285{
286 assert(newCPU);
287 if (cpu != NULL && cpu->cpuId() != newCPU->cpuId()) {

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