interrupts.cc (6069:cb5b778785a6) interrupts.cc (6136:4f8af2f3185f)
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

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290 }
291 cpu->wakeup();
292}
293
294
295void
296X86ISA::Interrupts::setCPU(BaseCPU * newCPU)
297{
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

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290 }
291 cpu->wakeup();
292}
293
294
295void
296X86ISA::Interrupts::setCPU(BaseCPU * newCPU)
297{
298 assert(newCPU);
299 if (cpu != NULL && cpu->cpuId() != newCPU->cpuId()) {
300 panic("Local APICs can't be moved between CPUs"
301 " with different IDs.\n");
302 }
298 cpu = newCPU;
303 cpu = newCPU;
299 assert(cpu);
300 regs[APIC_ID] = (cpu->cpuId() << 24);
304 initialApicId = cpu->cpuId();
305 regs[APIC_ID] = (initialApicId << 24);
301}
302
303
304Tick
305X86ISA::Interrupts::recvMessage(PacketPtr pkt)
306{
306}
307
308
309Tick
310X86ISA::Interrupts::recvMessage(PacketPtr pkt)
311{
307 uint8_t id = (regs[APIC_ID] >> 24);
308 Addr offset = pkt->getAddr() - x86InterruptAddress(id, 0);
312 Addr offset = pkt->getAddr() - x86InterruptAddress(initialApicId, 0);
309 assert(pkt->cmd == MemCmd::MessageReq);
310 switch(offset)
311 {
312 case 0:
313 {
314 TriggerIntMessage message = pkt->get<TriggerIntMessage>();
315 DPRINTF(LocalApic,
316 "Got Trigger Interrupt message with vector %#x.\n",
317 message.vector);
313 assert(pkt->cmd == MemCmd::MessageReq);
314 switch(offset)
315 {
316 case 0:
317 {
318 TriggerIntMessage message = pkt->get<TriggerIntMessage>();
319 DPRINTF(LocalApic,
320 "Got Trigger Interrupt message with vector %#x.\n",
321 message.vector);
318 // Make sure we're really supposed to get this.
319 assert((message.destMode == 0 && message.destination == id) ||
320 (bits((int)message.destination, id)));
321
322 requestInterrupt(message.vector,
323 message.deliveryMode, message.trigger);
324 }
325 break;
326 default:
327 panic("Local apic got unknown interrupt message at offset %#x.\n",
328 offset);

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349 DPRINTF(LocalApic, "ICR is now idle.\n");
350 return 0;
351}
352
353
354void
355X86ISA::Interrupts::addressRanges(AddrRangeList &range_list)
356{
322
323 requestInterrupt(message.vector,
324 message.deliveryMode, message.trigger);
325 }
326 break;
327 default:
328 panic("Local apic got unknown interrupt message at offset %#x.\n",
329 offset);

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350 DPRINTF(LocalApic, "ICR is now idle.\n");
351 return 0;
352}
353
354
355void
356X86ISA::Interrupts::addressRanges(AddrRangeList &range_list)
357{
357 uint8_t id = (regs[APIC_ID] >> 24);
358 range_list.clear();
358 range_list.clear();
359 Range range = RangeEx(x86LocalAPICAddress(id, 0),
360 x86LocalAPICAddress(id, 0) + PageBytes);
359 Range<Addr> range = RangeEx(x86LocalAPICAddress(initialApicId, 0),
360 x86LocalAPICAddress(initialApicId, 0) +
361 PageBytes);
361 range_list.push_back(range);
362 pioAddr = range.start;
363}
364
365
366void
367X86ISA::Interrupts::getIntAddrRange(AddrRangeList &range_list)
368{
362 range_list.push_back(range);
363 pioAddr = range.start;
364}
365
366
367void
368X86ISA::Interrupts::getIntAddrRange(AddrRangeList &range_list)
369{
369 uint8_t id = (regs[APIC_ID] >> 24);
370 range_list.clear();
370 range_list.clear();
371 range_list.push_back(RangeEx(x86InterruptAddress(id, 0),
372 x86InterruptAddress(id, 0) + PhysAddrAPICRangeSize));
371 range_list.push_back(RangeEx(x86InterruptAddress(initialApicId, 0),
372 x86InterruptAddress(initialApicId, 0) +
373 PhysAddrAPICRangeSize));
373}
374
375
376uint32_t
377X86ISA::Interrupts::readReg(ApicRegIndex reg)
378{
379 if (reg >= APIC_TRIGGER_MODE(0) &&
380 reg <= APIC_TRIGGER_MODE(15)) {

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510 case 2:
511 requestInterrupt(message.vector,
512 message.deliveryMode, message.trigger);
513 // Fall through
514 case 3:
515 {
516 int numContexts = sys->numContexts();
517 pendingIPIs += (numContexts - 1);
374}
375
376
377uint32_t
378X86ISA::Interrupts::readReg(ApicRegIndex reg)
379{
380 if (reg >= APIC_TRIGGER_MODE(0) &&
381 reg <= APIC_TRIGGER_MODE(15)) {

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511 case 2:
512 requestInterrupt(message.vector,
513 message.deliveryMode, message.trigger);
514 // Fall through
515 case 3:
516 {
517 int numContexts = sys->numContexts();
518 pendingIPIs += (numContexts - 1);
518 // We have no way to get at the thread context we're part
519 // of, so we'll just have to go with the CPU for now.
520 hack_once("Broadcast IPIs can't handle more than "
521 "one context per CPU.\n");
522 int myId = cpu->getContext(0)->contextId();
523 for (int i = 0; i < numContexts; i++) {
524 int thisId = sys->getThreadContext(i)->contextId();
519 for (int i = 0; i < numContexts; i++) {
520 int thisId = sys->getThreadContext(i)->contextId();
525 if (thisId != myId) {
521 if (thisId != initialApicId) {
526 PacketPtr pkt = buildIntRequest(thisId, message);
527 if (timing)
528 intPort->sendMessageTiming(pkt, latency);
529 else
530 intPort->sendMessageAtomic(pkt);
531 }
532 }
533 }

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584 BasicPioDevice(p), IntDev(this), latency(p->pio_latency), clock(0),
585 apicTimerEvent(this),
586 pendingSmi(false), smiVector(0),
587 pendingNmi(false), nmiVector(0),
588 pendingExtInt(false), extIntVector(0),
589 pendingInit(false), initVector(0),
590 pendingStartup(false), startupVector(0),
591 startedUp(false), pendingUnmaskableInt(false),
522 PacketPtr pkt = buildIntRequest(thisId, message);
523 if (timing)
524 intPort->sendMessageTiming(pkt, latency);
525 else
526 intPort->sendMessageAtomic(pkt);
527 }
528 }
529 }

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580 BasicPioDevice(p), IntDev(this), latency(p->pio_latency), clock(0),
581 apicTimerEvent(this),
582 pendingSmi(false), smiVector(0),
583 pendingNmi(false), nmiVector(0),
584 pendingExtInt(false), extIntVector(0),
585 pendingInit(false), initVector(0),
586 pendingStartup(false), startupVector(0),
587 startedUp(false), pendingUnmaskableInt(false),
592 pendingIPIs(0)
588 pendingIPIs(0), cpu(NULL)
593{
594 pioSize = PageBytes;
595 memset(regs, 0, sizeof(regs));
596 //Set the local apic DFR to the flat model.
597 regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
598 ISRV = 0;
599 IRRV = 0;
600}

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590 pioSize = PageBytes;
591 memset(regs, 0, sizeof(regs));
592 //Set the local apic DFR to the flat model.
593 regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
594 ISRV = 0;
595 IRRV = 0;
596}

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