interrupts.cc (5648:e8abda6e0980) interrupts.cc (5649:0e9c904551c1)
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

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210X86ISA::Interrupts::read(PacketPtr pkt)
211{
212 Addr offset = pkt->getAddr() - pioAddr;
213 //Make sure we're at least only accessing one register.
214 if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3)))
215 panic("Accessed more than one register at a time in the APIC!\n");
216 ApicRegIndex reg = decodeAddr(offset);
217 uint32_t val = htog(readReg(reg));
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

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210X86ISA::Interrupts::read(PacketPtr pkt)
211{
212 Addr offset = pkt->getAddr() - pioAddr;
213 //Make sure we're at least only accessing one register.
214 if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3)))
215 panic("Accessed more than one register at a time in the APIC!\n");
216 ApicRegIndex reg = decodeAddr(offset);
217 uint32_t val = htog(readReg(reg));
218 DPRINTF(LocalApic,
219 "Reading Local APIC register %d at offset %#x as %#x.\n",
220 reg, offset, val);
218 pkt->setData(((uint8_t *)&val) + (offset & mask(3)));
219 return latency;
220}
221
222Tick
223X86ISA::Interrupts::write(PacketPtr pkt)
224{
225 Addr offset = pkt->getAddr() - pioAddr;
226 //Make sure we're at least only accessing one register.
227 if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3)))
228 panic("Accessed more than one register at a time in the APIC!\n");
229 ApicRegIndex reg = decodeAddr(offset);
230 uint32_t val = regs[reg];
231 pkt->writeData(((uint8_t *)&val) + (offset & mask(3)));
221 pkt->setData(((uint8_t *)&val) + (offset & mask(3)));
222 return latency;
223}
224
225Tick
226X86ISA::Interrupts::write(PacketPtr pkt)
227{
228 Addr offset = pkt->getAddr() - pioAddr;
229 //Make sure we're at least only accessing one register.
230 if ((offset & ~mask(3)) != ((offset + pkt->getSize()) & ~mask(3)))
231 panic("Accessed more than one register at a time in the APIC!\n");
232 ApicRegIndex reg = decodeAddr(offset);
233 uint32_t val = regs[reg];
234 pkt->writeData(((uint8_t *)&val) + (offset & mask(3)));
235 DPRINTF(LocalApic,
236 "Writing Local APIC register %d at offset %#x as %#x.\n",
237 reg, offset, gtoh(val));
232 setReg(reg, gtoh(val));
233 return latency;
234}
235
236uint32_t
237X86ISA::Interrupts::readReg(ApicRegIndex reg)
238{
239 if (reg >= APIC_TRIGGER_MODE(0) &&

--- 155 unchanged lines hidden --- 		238 setReg(reg, gtoh(val));
239 return latency;
240}
241
242uint32_t
243X86ISA::Interrupts::readReg(ApicRegIndex reg)
244{
245 if (reg >= APIC_TRIGGER_MODE(0) &&

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