1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * Redistribution and use of this software in source and binary forms,
6 * with or without modification, are permitted provided that the
7 * following conditions are met:
8 *

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469 regs[reg] = newVal;
470 return;
471}
472
473bool
474X86ISA::Interrupts::check_interrupts(ThreadContext * tc) const
475{
476 RFLAGS rflags = tc->readMiscRegNoEffect(MISCREG_RFLAGS);
477 if (pendingUnmaskableInt)
478 return true;
479 if (rflags.intf) {
480 if (pendingExtInt)
481 return true;
482 if (IRRV > ISRV && bits(IRRV, 7, 4) >
483 bits(regs[APIC_TASK_PRIORITY], 7, 4))
484 return true;
485 }
486 return false;
487}
488
489Fault
490X86ISA::Interrupts::getInterrupt(ThreadContext * tc)
491{
492 assert(check_interrupts(tc));
493 // These are all probably fairly uncommon, so we'll make them easier to
494 // check for.
495 if (pendingUnmaskableInt) {
496 if (pendingSmi) {
497 return new SystemManagementInterrupt();
498 } else if (pendingNmi) {
499 return new NonMaskableInterrupt(nmiMessage.vector);
500 } else if (pendingInit) {
501 return new InitInterrupt(initMessage.vector);
502 } else {
503 panic("pendingUnmaskableInt set, but no unmaskable "
504 "ints were pending.\n");
505 return NoFault;
506 }
507 } else if (pendingExtInt) {
508 return new ExternalInterrupt(extIntMessage.vector);
509 } else {
510 // The only thing left are fixed and lowest priority interrupts.
511 return new ExternalInterrupt(IRRV);
512 }
513}
514
515void
516X86ISA::Interrupts::updateIntrInfo(ThreadContext * tc)
517{
518 assert(check_interrupts(tc));
519 if (pendingUnmaskableInt) {
520 if (pendingSmi) {
521 pendingSmi = false;
522 } else if (pendingNmi) {
523 pendingNmi = false;
524 } else if (pendingInit) {
525 pendingInit = false;
526 }
527 if (!(pendingSmi || pendingNmi || pendingInit))
528 pendingUnmaskableInt = false;
529 } else if (pendingExtInt) {
530 pendingExtInt = false;
531 } else {
532 // Mark the interrupt as "in service".
533 ISRV = IRRV;
534 setRegArrayBit(APIC_IN_SERVICE_BASE, ISRV);
535 // Clear it out of the IRR.
536 clearRegArrayBit(APIC_INTERRUPT_REQUEST_BASE, IRRV);
537 updateIRRV();
538 }
539}
540
541X86ISA::Interrupts *
542X86LocalApicParams::create()
543{
544 return new X86ISA::Interrupts(this);
545}