1/*
2 * Copyright (c) 2012-2013 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

--- 394 unchanged lines hidden (view full) ---

405 panic("Local APIC Processor Priority register unimplemented.\n");
406 break;
407 case APIC_ERROR_STATUS:
408 regs[APIC_INTERNAL_STATE] &= ~ULL(0x1);
409 break;
410 case APIC_CURRENT_COUNT:
411 {
412 if (apicTimerEvent.scheduled()) {
413 // Compute how many m5 ticks happen per count.
414 uint64_t ticksPerCount = clockPeriod() *
415 divideFromConf(regs[APIC_DIVIDE_CONFIGURATION]);
416 // Compute how many m5 ticks are left.
417 uint64_t val = apicTimerEvent.when() - curTick();
418 // Turn that into a count.
419 val = (val + ticksPerCount - 1) / ticksPerCount;
420 return val;
421 } else {
422 return 0;

--- 158 unchanged lines hidden (view full) ---

581 {
582 uint64_t readOnlyMask = (1 << 12) | (1 << 14);
583 newVal = (val & ~readOnlyMask) |
584 (regs[reg] & readOnlyMask);
585 }
586 break;
587 case APIC_INITIAL_COUNT:
588 {
589 newVal = bits(val, 31, 0);
590 // Compute how many timer ticks we're being programmed for.
591 uint64_t newCount = newVal *
592 (divideFromConf(regs[APIC_DIVIDE_CONFIGURATION]));
593 // Schedule on the edge of the next tick plus the new count.
594 Tick offset = curTick() % clockPeriod();
595 if (offset) {
596 reschedule(apicTimerEvent,
597 curTick() + (newCount + 1) *
598 clockPeriod() - offset, true);
599 } else {
600 reschedule(apicTimerEvent,
601 curTick() + newCount *
602 clockPeriod(), true);
603 }
604 }
605 break;
606 case APIC_CURRENT_COUNT:
607 //Local APIC Current Count register is read only.
608 return;
609 case APIC_DIVIDE_CONFIGURATION:
610 newVal = val & 0xB;

--- 13 unchanged lines hidden (view full) ---

624 pendingNmi(false), nmiVector(0),
625 pendingExtInt(false), extIntVector(0),
626 pendingInit(false), initVector(0),
627 pendingStartup(false), startupVector(0),
628 startedUp(false), pendingUnmaskableInt(false),
629 pendingIPIs(0), cpu(NULL),
630 intSlavePort(name() + ".int_slave", this, this, latency)
631{
632 pioSize = PageBytes;
633 memset(regs, 0, sizeof(regs));
634 //Set the local apic DFR to the flat model.
635 regs[APIC_DESTINATION_FORMAT] = (uint32_t)(-1);
636 ISRV = 0;
637 IRRV = 0;
638}
639

--- 88 unchanged lines hidden (view full) ---

728 updateIRRV();
729 }
730}
731
732void
733X86ISA::Interrupts::serialize(std::ostream &os)
734{
735 SERIALIZE_ARRAY(regs, NUM_APIC_REGS);
736 SERIALIZE_SCALAR(pendingSmi);
737 SERIALIZE_SCALAR(smiVector);
738 SERIALIZE_SCALAR(pendingNmi);
739 SERIALIZE_SCALAR(nmiVector);
740 SERIALIZE_SCALAR(pendingExtInt);
741 SERIALIZE_SCALAR(extIntVector);
742 SERIALIZE_SCALAR(pendingInit);
743 SERIALIZE_SCALAR(initVector);

--- 9 unchanged lines hidden (view full) ---

753 Tick apicTimerEventTick = apicTimerEvent.when();
754 SERIALIZE_SCALAR(apicTimerEventTick);
755}
756
757void
758X86ISA::Interrupts::unserialize(Checkpoint *cp, const std::string &section)
759{
760 UNSERIALIZE_ARRAY(regs, NUM_APIC_REGS);
761 UNSERIALIZE_SCALAR(pendingSmi);
762 UNSERIALIZE_SCALAR(smiVector);
763 UNSERIALIZE_SCALAR(pendingNmi);
764 UNSERIALIZE_SCALAR(nmiVector);
765 UNSERIALIZE_SCALAR(pendingExtInt);
766 UNSERIALIZE_SCALAR(extIntVector);
767 UNSERIALIZE_SCALAR(pendingInit);
768 UNSERIALIZE_SCALAR(initVector);

--- 25 unchanged lines hidden ---