static_inst.hh (11321:02e930db812d) static_inst.hh (12104:edd63f9c6184)
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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46
47namespace X86ISA
48{
49 /**
50 * Class for register indices passed to instruction constructors. Using a
51 * wrapper struct for these lets take advantage of the compiler's type
52 * checking.
53 */
1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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46
47namespace X86ISA
48{
49 /**
50 * Class for register indices passed to instruction constructors. Using a
51 * wrapper struct for these lets take advantage of the compiler's type
52 * checking.
53 */
54 struct InstRegIndex
54 struct InstRegIndex : public RegId
55 {
55 {
56 RegIndex idx;
57 explicit InstRegIndex(RegIndex _idx) : idx(_idx)
58 {}
56 explicit InstRegIndex(RegIndex _idx) :
57 RegId(computeRegClass(_idx), _idx) {}
58
59 private:
60 // TODO: As X86 register index definition is highly built on the
61 // unified space concept, it is easier for the moment to rely on
62 // an helper function to compute the RegClass. It would be nice
63 // to fix those definition and get rid of this.
64 RegClass computeRegClass(RegIndex _idx) {
65 if (_idx < FP_Reg_Base) {
66 return IntRegClass;
67 } else if (_idx < CC_Reg_Base) {
68 return FloatRegClass;
69 } else if (_idx < Misc_Reg_Base) {
70 return CCRegClass;
71 } else {
72 return MiscRegClass;
73 }
74 }
59 };
60
61 /**
62 * Base class for all X86 static instructions.
63 */
64
65 class X86StaticInst : public StaticInst
66 {

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76 const SymbolTable *symtab) const;
77
78 void printMnemonic(std::ostream &os, const char * mnemonic) const;
79 void printMnemonic(std::ostream &os, const char * instMnemonic,
80 const char * mnemonic) const;
81
82 void printSegment(std::ostream &os, int segment) const;
83
75 };
76
77 /**
78 * Base class for all X86 static instructions.
79 */
80
81 class X86StaticInst : public StaticInst
82 {

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92 const SymbolTable *symtab) const;
93
94 void printMnemonic(std::ostream &os, const char * mnemonic) const;
95 void printMnemonic(std::ostream &os, const char * instMnemonic,
96 const char * mnemonic) const;
97
98 void printSegment(std::ostream &os, int segment) const;
99
84 void printReg(std::ostream &os, int reg, int size) const;
100 void printReg(std::ostream &os, RegId reg, int size) const;
85 void printSrcReg(std::ostream &os, int reg, int size) const;
86 void printDestReg(std::ostream &os, int reg, int size) const;
87 void printMem(std::ostream &os, uint8_t segment,
88 uint8_t scale, RegIndex index, RegIndex base,
89 uint64_t disp, uint8_t addressSize, bool rip) const;
90
91 inline uint64_t merge(uint64_t into, uint64_t val, int size) const
92 {
93 X86IntReg reg = into;
101 void printSrcReg(std::ostream &os, int reg, int size) const;
102 void printDestReg(std::ostream &os, int reg, int size) const;
103 void printMem(std::ostream &os, uint8_t segment,
104 uint8_t scale, RegIndex index, RegIndex base,
105 uint64_t disp, uint8_t addressSize, bool rip) const;
106
107 inline uint64_t merge(uint64_t into, uint64_t val, int size) const
108 {
109 X86IntReg reg = into;
94 if (_destRegIdx[0] & IntFoldBit)
110 if (_destRegIdx[0].regIdx & IntFoldBit)
95 {
96 reg.H = val;
97 return reg;
98 }
99 switch(size)
100 {
101 case 1:
102 reg.L = val;

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117 }
118 return reg;
119 }
120
121 inline uint64_t pick(uint64_t from, int idx, int size) const
122 {
123 X86IntReg reg = from;
124 DPRINTF(X86, "Picking with size %d\n", size);
111 {
112 reg.H = val;
113 return reg;
114 }
115 switch(size)
116 {
117 case 1:
118 reg.L = val;

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133 }
134 return reg;
135 }
136
137 inline uint64_t pick(uint64_t from, int idx, int size) const
138 {
139 X86IntReg reg = from;
140 DPRINTF(X86, "Picking with size %d\n", size);
125 if (_srcRegIdx[idx] & IntFoldBit)
141 if (_srcRegIdx[idx].regIdx & IntFoldBit)
126 return reg.H;
127 switch(size)
128 {
129 case 1:
130 return reg.L;
131 case 2:
132 return reg.X;
133 case 4:

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138 panic("Tried to pick with unrecognized size %d.\n", size);
139 }
140 }
141
142 inline int64_t signedPick(uint64_t from, int idx, int size) const
143 {
144 X86IntReg reg = from;
145 DPRINTF(X86, "Picking with size %d\n", size);
142 return reg.H;
143 switch(size)
144 {
145 case 1:
146 return reg.L;
147 case 2:
148 return reg.X;
149 case 4:

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154 panic("Tried to pick with unrecognized size %d.\n", size);
155 }
156 }
157
158 inline int64_t signedPick(uint64_t from, int idx, int size) const
159 {
160 X86IntReg reg = from;
161 DPRINTF(X86, "Picking with size %d\n", size);
146 if (_srcRegIdx[idx] & IntFoldBit)
162 if (_srcRegIdx[idx].regIdx & IntFoldBit)
147 return reg.SH;
148 switch(size)
149 {
150 case 1:
151 return reg.SL;
152 case 2:
153 return reg.SX;
154 case 4:

--- 17 unchanged lines hidden --- 		163 return reg.SH;
164 switch(size)
165 {
166 case 1:
167 return reg.SL;
168 case 2:
169 return reg.SX;
170 case 4:

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