69c69
< printReg(response, data, dataSize);
---
> printDestReg(response, 0, dataSize);
73c73
< printReg(response, index, addressSize);
---
> printSrcReg(response, 0, addressSize);
75c75
< printReg(response, base, addressSize);
---
> printSrcReg(response, 1, addressSize);