1/* 2 * Copyright (c) 2003-2007 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 110 unchanged lines hidden (view full) --- 119 vaddr, tc->readPC()); 120 Process *p = tc->getProcessPtr(); 121 TlbEntry entry; 122 bool success = p->pTable->lookup(vaddr, entry); 123 if(!success) { 124 panic("Tried to execute unmapped address %#x.\n", vaddr); 125 } else { 126 Addr alignedVaddr = p->pTable->pageAlign(vaddr); |
127 DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr, 128 entry.pageStart()); |
129 tc->getITBPtr()->insert(alignedVaddr, entry); 130 } 131 } 132 133 void FakeDTLBFault::invoke(ThreadContext * tc) 134 { 135 DPRINTF(TLB, "Invoking an DTLB fault for address %#x at pc %#x.\n", 136 vaddr, tc->readPC()); 137 Process *p = tc->getProcessPtr(); 138 TlbEntry entry; 139 bool success = p->pTable->lookup(vaddr, entry); 140 if(!success) { 141 p->checkAndAllocNextPage(vaddr); 142 success = p->pTable->lookup(vaddr, entry); 143 } 144 if(!success) { 145 panic("Tried to access unmapped address %#x.\n", vaddr); 146 } else { 147 Addr alignedVaddr = p->pTable->pageAlign(vaddr); |
148 DPRINTF(TLB, "Mapping %#x to %#x\n", alignedVaddr, 149 entry.pageStart()); |
150 tc->getDTBPtr()->insert(alignedVaddr, entry); 151 } 152 } 153#endif 154} // namespace X86ISA 155 |