faults.cc (6048:65a321a3a691) | faults.cc (6049:595b5016f6d5) |
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1/* 2 * Copyright (c) 2003-2007 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 268 unchanged lines hidden (view full) --- 277 m5Reg.submode = RealMode; 278 m5Reg.cpl = 0; 279 tc->setMiscReg(MISCREG_M5_REG, m5Reg); 280 MicroPC entry = X86ISAInst::RomLabels::extern_label_initIntHalt; 281 tc->setMicroPC(romMicroPC(entry)); 282 tc->setNextMicroPC(romMicroPC(entry) + 1); 283 } 284 | 1/* 2 * Copyright (c) 2003-2007 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 268 unchanged lines hidden (view full) --- 277 m5Reg.submode = RealMode; 278 m5Reg.cpl = 0; 279 tc->setMiscReg(MISCREG_M5_REG, m5Reg); 280 MicroPC entry = X86ISAInst::RomLabels::extern_label_initIntHalt; 281 tc->setMicroPC(romMicroPC(entry)); 282 tc->setNextMicroPC(romMicroPC(entry) + 1); 283 } 284 |
285 void 286 StartupInterrupt::invoke(ThreadContext *tc) 287 { 288 DPRINTF(Faults, "Startup interrupt with vector %#x.\n", vector); 289 HandyM5Reg m5Reg = tc->readMiscReg(MISCREG_M5_REG); 290 if (m5Reg.mode != LegacyMode || m5Reg.submode != RealMode) { 291 panic("Startup IPI recived outside of real mode. " 292 "Don't know what to do."); 293 } 294 295 tc->setMiscReg(MISCREG_CS, vector << 8); 296 tc->setMiscReg(MISCREG_CS_BASE, vector << 12); 297 tc->setMiscReg(MISCREG_CS_EFF_BASE, vector << 12); 298 // This has the base value pre-added. 299 tc->setMiscReg(MISCREG_CS_LIMIT, 0xffff); 300 301 tc->setPC(tc->readMiscReg(MISCREG_CS_BASE)); 302 tc->setNextPC(tc->readPC() + sizeof(MachInst)); 303 } 304 |
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285#endif 286} // namespace X86ISA 287 | 305#endif 306} // namespace X86ISA 307 |