1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#include "arch/x86/emulenv.hh"
41
42#include <cassert>
43
| 1/*
2 * Copyright (c) 2007 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Gabe Black
38 */
39
40#include "arch/x86/emulenv.hh"
41
42#include <cassert>
43
|
45
46using namespace X86ISA;
47
48void EmulEnv::doModRM(const ExtMachInst & machInst)
49{
50 assert(machInst.modRM.mod != 3);
51 //Use the SIB byte for addressing if the modrm byte calls for it.
52 if (machInst.modRM.rm == 4 && machInst.addrSize != 2) {
53 scale = 1 << machInst.sib.scale;
54 index = machInst.sib.index | (machInst.rex.x << 3);
55 base = machInst.sib.base | (machInst.rex.b << 3);
56 //In this special case, we don't use a base. The displacement also
57 //changes, but that's managed by the decoder.
58 if (machInst.sib.base == INTREG_RBP && machInst.modRM.mod == 0)
59 base = NUM_INTREGS;
60 //In -this- special case, we don't use an index.
61 if (index == INTREG_RSP)
62 index = NUM_INTREGS;
63 } else {
64 if (machInst.addrSize == 2) {
65 unsigned rm = machInst.modRM.rm;
66 if (rm <= 3) {
67 scale = 1;
68 if (rm < 2) {
69 base = INTREG_RBX;
70 } else {
71 base = INTREG_RBP;
72 }
73 index = (rm % 2) ? INTREG_RDI : INTREG_RSI;
74 } else {
75 scale = 0;
76 switch (rm) {
77 case 4:
78 base = INTREG_RSI;
79 break;
80 case 5:
81 base = INTREG_RDI;
82 break;
83 case 6:
84 base = INTREG_RBP;
85 break;
86 case 7:
87 base = INTREG_RBX;
88 break;
89 }
90 }
91 } else {
92 scale = 0;
93 base = machInst.modRM.rm | (machInst.rex.b << 3);
94 if (machInst.modRM.mod == 0 && machInst.modRM.rm == 5) {
95 //Since we need to use a different encoding of this
96 //instruction anyway, just ignore the base in those cases
97 base = NUM_INTREGS;
98 }
99 }
100 }
101 //Figure out what segment to use. This won't be entirely accurate since
102 //the presence of a displacement is supposed to make the instruction
103 //default to the data segment.
104 if ((base != INTREG_RBP && base != INTREG_RSP) || machInst.dispSize) {
105 seg = SEGMENT_REG_DS;
106 //Handle any segment override that might have been in the instruction
107 int segFromInst = machInst.legacy.seg;
108 if (segFromInst)
109 seg = (SegmentRegIndex)(segFromInst - 1);
110 } else {
111 seg = SEGMENT_REG_SS;
112 }
113}
114
115void EmulEnv::setSeg(const ExtMachInst & machInst)
116{
117 seg = SEGMENT_REG_DS;
118 //Handle any segment override that might have been in the instruction
119 int segFromInst = machInst.legacy.seg;
120 if (segFromInst)
121 seg = (SegmentRegIndex)(segFromInst - 1);
122}
| 45
46using namespace X86ISA;
47
48void EmulEnv::doModRM(const ExtMachInst & machInst)
49{
50 assert(machInst.modRM.mod != 3);
51 //Use the SIB byte for addressing if the modrm byte calls for it.
52 if (machInst.modRM.rm == 4 && machInst.addrSize != 2) {
53 scale = 1 << machInst.sib.scale;
54 index = machInst.sib.index | (machInst.rex.x << 3);
55 base = machInst.sib.base | (machInst.rex.b << 3);
56 //In this special case, we don't use a base. The displacement also
57 //changes, but that's managed by the decoder.
58 if (machInst.sib.base == INTREG_RBP && machInst.modRM.mod == 0)
59 base = NUM_INTREGS;
60 //In -this- special case, we don't use an index.
61 if (index == INTREG_RSP)
62 index = NUM_INTREGS;
63 } else {
64 if (machInst.addrSize == 2) {
65 unsigned rm = machInst.modRM.rm;
66 if (rm <= 3) {
67 scale = 1;
68 if (rm < 2) {
69 base = INTREG_RBX;
70 } else {
71 base = INTREG_RBP;
72 }
73 index = (rm % 2) ? INTREG_RDI : INTREG_RSI;
74 } else {
75 scale = 0;
76 switch (rm) {
77 case 4:
78 base = INTREG_RSI;
79 break;
80 case 5:
81 base = INTREG_RDI;
82 break;
83 case 6:
84 base = INTREG_RBP;
85 break;
86 case 7:
87 base = INTREG_RBX;
88 break;
89 }
90 }
91 } else {
92 scale = 0;
93 base = machInst.modRM.rm | (machInst.rex.b << 3);
94 if (machInst.modRM.mod == 0 && machInst.modRM.rm == 5) {
95 //Since we need to use a different encoding of this
96 //instruction anyway, just ignore the base in those cases
97 base = NUM_INTREGS;
98 }
99 }
100 }
101 //Figure out what segment to use. This won't be entirely accurate since
102 //the presence of a displacement is supposed to make the instruction
103 //default to the data segment.
104 if ((base != INTREG_RBP && base != INTREG_RSP) || machInst.dispSize) {
105 seg = SEGMENT_REG_DS;
106 //Handle any segment override that might have been in the instruction
107 int segFromInst = machInst.legacy.seg;
108 if (segFromInst)
109 seg = (SegmentRegIndex)(segFromInst - 1);
110 } else {
111 seg = SEGMENT_REG_SS;
112 }
113}
114
115void EmulEnv::setSeg(const ExtMachInst & machInst)
116{
117 seg = SEGMENT_REG_DS;
118 //Handle any segment override that might have been in the instruction
119 int segFromInst = machInst.legacy.seg;
120 if (segFromInst)
121 seg = (SegmentRegIndex)(segFromInst - 1);
122}
|