decoder.hh (9023:e9201a7bce59) decoder.hh (9024:5851586f399c)
1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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35
36#include "arch/x86/regs/misc.hh"
37#include "arch/x86/types.hh"
38#include "base/bitfield.hh"
39#include "base/misc.hh"
40#include "base/trace.hh"
41#include "base/types.hh"
42#include "cpu/decode_cache.hh"
1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 26 unchanged lines hidden (view full) ---

35
36#include "arch/x86/regs/misc.hh"
37#include "arch/x86/types.hh"
38#include "base/bitfield.hh"
39#include "base/misc.hh"
40#include "base/trace.hh"
41#include "base/types.hh"
42#include "cpu/decode_cache.hh"
43#include "cpu/static_inst_fwd.hh"
43#include "cpu/static_inst.hh"
44#include "debug/Decoder.hh"
45
46class ThreadContext;
47
48namespace X86ISA
49{
50
51class Decoder

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213 "basePC: %#x offset: %#x origPC: %#x size: %d\n",
214 basePC, offset, origPC, size);
215 nextPC.size(size);
216 nextPC.npc(nextPC.pc() + size);
217 }
218 }
219
220 protected:
44#include "debug/Decoder.hh"
45
46class ThreadContext;
47
48namespace X86ISA
49{
50
51class Decoder

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213 "basePC: %#x offset: %#x origPC: %#x size: %d\n",
214 basePC, offset, origPC, size);
215 nextPC.size(size);
216 nextPC.npc(nextPC.pc() + size);
217 }
218 }
219
220 protected:
221 /// A cache of decoded instruction objects.
222 static DecodeCache defaultCache;
221 /// Caching for decoded instruction objects.
222 static DecodeCache::InstMap instMap;
223 static DecodeCache::AddrMap<StaticInstPtr> decodePages;
223
224 public:
225 StaticInstPtr decodeInst(ExtMachInst mach_inst);
226
227 /// Decode a machine instruction.
228 /// @param mach_inst The binary instruction to decode.
229 /// @retval A pointer to the corresponding StaticInst object.
224
225 public:
226 StaticInstPtr decodeInst(ExtMachInst mach_inst);
227
228 /// Decode a machine instruction.
229 /// @param mach_inst The binary instruction to decode.
230 /// @retval A pointer to the corresponding StaticInst object.
230 StaticInstPtr
231 decode(ExtMachInst mach_inst, Addr addr)
232 {
233 return defaultCache.decode(this, mach_inst, addr);
234 }
231 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
235
236 StaticInstPtr
237 decode(X86ISA::PCState &nextPC)
238 {
239 if (!instDone)
240 return NULL;
241 instDone = false;
242 updateNPC(nextPC);
243 return decode(emi, origPC);
244 }
245};
246
247} // namespace X86ISA
248
249#endif // __ARCH_X86_DECODER_HH__
232
233 StaticInstPtr
234 decode(X86ISA::PCState &nextPC)
235 {
236 if (!instDone)
237 return NULL;
238 instDone = false;
239 updateNPC(nextPC);
240 return decode(emi, origPC);
241 }
242};
243
244} // namespace X86ISA
245
246#endif // __ARCH_X86_DECODER_HH__