1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_X86_DECODER_HH__
32#define __ARCH_X86_DECODER_HH__
33
34#include <cassert>
35
36#include "arch/x86/regs/misc.hh"
37#include "arch/x86/types.hh"
38#include "base/bitfield.hh"
39#include "base/misc.hh"
40#include "base/trace.hh"
41#include "base/types.hh"
42#include "cpu/decode_cache.hh"
| 1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_X86_DECODER_HH__
32#define __ARCH_X86_DECODER_HH__
33
34#include <cassert>
35
36#include "arch/x86/regs/misc.hh"
37#include "arch/x86/types.hh"
38#include "base/bitfield.hh"
39#include "base/misc.hh"
40#include "base/trace.hh"
41#include "base/types.hh"
42#include "cpu/decode_cache.hh"
|
43#include "cpu/static_inst_fwd.hh"
| 43#include "cpu/static_inst.hh"
|
44#include "debug/Decoder.hh"
45
46class ThreadContext;
47
48namespace X86ISA
49{
50
51class Decoder
52{
53 private:
54 //These are defined and documented in decoder_tables.cc
55 static const uint8_t Prefixes[256];
56 static const uint8_t UsesModRM[2][256];
57 static const uint8_t ImmediateType[2][256];
58 static const uint8_t SizeTypeToSize[3][10];
59
60 protected:
61 ThreadContext * tc;
62 //The bytes to be predecoded
63 MachInst fetchChunk;
64 //The pc of the start of fetchChunk
65 Addr basePC;
66 //The pc the current instruction started at
67 Addr origPC;
68 //The offset into fetchChunk of current processing
69 int offset;
70 //The extended machine instruction being generated
71 ExtMachInst emi;
72 HandyM5Reg m5Reg;
73
74 inline uint8_t getNextByte()
75 {
76 return ((uint8_t *)&fetchChunk)[offset];
77 }
78
79 void getImmediate(int &collected, uint64_t ¤t, int size)
80 {
81 //Figure out how many bytes we still need to get for the
82 //immediate.
83 int toGet = size - collected;
84 //Figure out how many bytes are left in our "buffer"
85 int remaining = sizeof(MachInst) - offset;
86 //Get as much as we need, up to the amount available.
87 toGet = toGet > remaining ? remaining : toGet;
88
89 //Shift the bytes we want to be all the way to the right
90 uint64_t partialImm = fetchChunk >> (offset * 8);
91 //Mask off what we don't want
92 partialImm &= mask(toGet * 8);
93 //Shift it over to overlay with our displacement.
94 partialImm <<= (immediateCollected * 8);
95 //Put it into our displacement
96 current |= partialImm;
97 //Update how many bytes we've collected.
98 collected += toGet;
99 consumeBytes(toGet);
100 }
101
102 inline void consumeByte()
103 {
104 offset++;
105 assert(offset <= sizeof(MachInst));
106 if(offset == sizeof(MachInst))
107 outOfBytes = true;
108 }
109
110 inline void consumeBytes(int numBytes)
111 {
112 offset += numBytes;
113 assert(offset <= sizeof(MachInst));
114 if(offset == sizeof(MachInst))
115 outOfBytes = true;
116 }
117
118 void doReset();
119
120 //State machine state
121 protected:
122 //Whether or not we're out of bytes
123 bool outOfBytes;
124 //Whether we've completed generating an ExtMachInst
125 bool instDone;
126 //The size of the displacement value
127 int displacementSize;
128 //The size of the immediate value
129 int immediateSize;
130 //This is how much of any immediate value we've gotten. This is used
131 //for both the actual immediate and the displacement.
132 int immediateCollected;
133
134 enum State {
135 ResetState,
136 PrefixState,
137 OpcodeState,
138 ModRMState,
139 SIBState,
140 DisplacementState,
141 ImmediateState,
142 //We should never get to this state. Getting here is an error.
143 ErrorState
144 };
145
146 State state;
147
148 //Functions to handle each of the states
149 State doPrefixState(uint8_t);
150 State doOpcodeState(uint8_t);
151 State doModRMState(uint8_t);
152 State doSIBState(uint8_t);
153 State doDisplacementState();
154 State doImmediateState();
155
156 public:
157 Decoder(ThreadContext * _tc) :
158 tc(_tc), basePC(0), origPC(0), offset(0),
159 outOfBytes(true), instDone(false),
160 state(ResetState)
161 {
162 emi.mode.mode = LongMode;
163 emi.mode.submode = SixtyFourBitMode;
164 m5Reg = 0;
165 }
166
167 void reset()
168 {
169 state = ResetState;
170 }
171
172 ThreadContext * getTC()
173 {
174 return tc;
175 }
176
177 void setTC(ThreadContext * _tc)
178 {
179 tc = _tc;
180 }
181
182 void process();
183
184 //Use this to give data to the decoder. This should be used
185 //when there is control flow.
186 void moreBytes(const PCState &pc, Addr fetchPC, MachInst data)
187 {
188 DPRINTF(Decoder, "Getting more bytes.\n");
189 basePC = fetchPC;
190 offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
191 fetchChunk = data;
192 outOfBytes = false;
193 process();
194 }
195
196 bool needMoreBytes()
197 {
198 return outOfBytes;
199 }
200
201 bool instReady()
202 {
203 return instDone;
204 }
205
206 void
207 updateNPC(X86ISA::PCState &nextPC)
208 {
209 if (!nextPC.size()) {
210 int size = basePC + offset - origPC;
211 DPRINTF(Decoder,
212 "Calculating the instruction size: "
213 "basePC: %#x offset: %#x origPC: %#x size: %d\n",
214 basePC, offset, origPC, size);
215 nextPC.size(size);
216 nextPC.npc(nextPC.pc() + size);
217 }
218 }
219
220 protected:
| 44#include "debug/Decoder.hh"
45
46class ThreadContext;
47
48namespace X86ISA
49{
50
51class Decoder
52{
53 private:
54 //These are defined and documented in decoder_tables.cc
55 static const uint8_t Prefixes[256];
56 static const uint8_t UsesModRM[2][256];
57 static const uint8_t ImmediateType[2][256];
58 static const uint8_t SizeTypeToSize[3][10];
59
60 protected:
61 ThreadContext * tc;
62 //The bytes to be predecoded
63 MachInst fetchChunk;
64 //The pc of the start of fetchChunk
65 Addr basePC;
66 //The pc the current instruction started at
67 Addr origPC;
68 //The offset into fetchChunk of current processing
69 int offset;
70 //The extended machine instruction being generated
71 ExtMachInst emi;
72 HandyM5Reg m5Reg;
73
74 inline uint8_t getNextByte()
75 {
76 return ((uint8_t *)&fetchChunk)[offset];
77 }
78
79 void getImmediate(int &collected, uint64_t ¤t, int size)
80 {
81 //Figure out how many bytes we still need to get for the
82 //immediate.
83 int toGet = size - collected;
84 //Figure out how many bytes are left in our "buffer"
85 int remaining = sizeof(MachInst) - offset;
86 //Get as much as we need, up to the amount available.
87 toGet = toGet > remaining ? remaining : toGet;
88
89 //Shift the bytes we want to be all the way to the right
90 uint64_t partialImm = fetchChunk >> (offset * 8);
91 //Mask off what we don't want
92 partialImm &= mask(toGet * 8);
93 //Shift it over to overlay with our displacement.
94 partialImm <<= (immediateCollected * 8);
95 //Put it into our displacement
96 current |= partialImm;
97 //Update how many bytes we've collected.
98 collected += toGet;
99 consumeBytes(toGet);
100 }
101
102 inline void consumeByte()
103 {
104 offset++;
105 assert(offset <= sizeof(MachInst));
106 if(offset == sizeof(MachInst))
107 outOfBytes = true;
108 }
109
110 inline void consumeBytes(int numBytes)
111 {
112 offset += numBytes;
113 assert(offset <= sizeof(MachInst));
114 if(offset == sizeof(MachInst))
115 outOfBytes = true;
116 }
117
118 void doReset();
119
120 //State machine state
121 protected:
122 //Whether or not we're out of bytes
123 bool outOfBytes;
124 //Whether we've completed generating an ExtMachInst
125 bool instDone;
126 //The size of the displacement value
127 int displacementSize;
128 //The size of the immediate value
129 int immediateSize;
130 //This is how much of any immediate value we've gotten. This is used
131 //for both the actual immediate and the displacement.
132 int immediateCollected;
133
134 enum State {
135 ResetState,
136 PrefixState,
137 OpcodeState,
138 ModRMState,
139 SIBState,
140 DisplacementState,
141 ImmediateState,
142 //We should never get to this state. Getting here is an error.
143 ErrorState
144 };
145
146 State state;
147
148 //Functions to handle each of the states
149 State doPrefixState(uint8_t);
150 State doOpcodeState(uint8_t);
151 State doModRMState(uint8_t);
152 State doSIBState(uint8_t);
153 State doDisplacementState();
154 State doImmediateState();
155
156 public:
157 Decoder(ThreadContext * _tc) :
158 tc(_tc), basePC(0), origPC(0), offset(0),
159 outOfBytes(true), instDone(false),
160 state(ResetState)
161 {
162 emi.mode.mode = LongMode;
163 emi.mode.submode = SixtyFourBitMode;
164 m5Reg = 0;
165 }
166
167 void reset()
168 {
169 state = ResetState;
170 }
171
172 ThreadContext * getTC()
173 {
174 return tc;
175 }
176
177 void setTC(ThreadContext * _tc)
178 {
179 tc = _tc;
180 }
181
182 void process();
183
184 //Use this to give data to the decoder. This should be used
185 //when there is control flow.
186 void moreBytes(const PCState &pc, Addr fetchPC, MachInst data)
187 {
188 DPRINTF(Decoder, "Getting more bytes.\n");
189 basePC = fetchPC;
190 offset = (fetchPC >= pc.instAddr()) ? 0 : pc.instAddr() - fetchPC;
191 fetchChunk = data;
192 outOfBytes = false;
193 process();
194 }
195
196 bool needMoreBytes()
197 {
198 return outOfBytes;
199 }
200
201 bool instReady()
202 {
203 return instDone;
204 }
205
206 void
207 updateNPC(X86ISA::PCState &nextPC)
208 {
209 if (!nextPC.size()) {
210 int size = basePC + offset - origPC;
211 DPRINTF(Decoder,
212 "Calculating the instruction size: "
213 "basePC: %#x offset: %#x origPC: %#x size: %d\n",
214 basePC, offset, origPC, size);
215 nextPC.size(size);
216 nextPC.npc(nextPC.pc() + size);
217 }
218 }
219
220 protected:
|
221 /// A cache of decoded instruction objects.
222 static DecodeCache defaultCache;
| 221 /// Caching for decoded instruction objects.
222 static DecodeCache::InstMap instMap;
223 static DecodeCache::AddrMap<StaticInstPtr> decodePages;
|
223
224 public:
225 StaticInstPtr decodeInst(ExtMachInst mach_inst);
226
227 /// Decode a machine instruction.
228 /// @param mach_inst The binary instruction to decode.
229 /// @retval A pointer to the corresponding StaticInst object.
| 224
225 public:
226 StaticInstPtr decodeInst(ExtMachInst mach_inst);
227
228 /// Decode a machine instruction.
229 /// @param mach_inst The binary instruction to decode.
230 /// @retval A pointer to the corresponding StaticInst object.
|
230 StaticInstPtr
231 decode(ExtMachInst mach_inst, Addr addr)
232 {
233 return defaultCache.decode(this, mach_inst, addr);
234 }
| 231 StaticInstPtr decode(ExtMachInst mach_inst, Addr addr);
|
235
236 StaticInstPtr
237 decode(X86ISA::PCState &nextPC)
238 {
239 if (!instDone)
240 return NULL;
241 instDone = false;
242 updateNPC(nextPC);
243 return decode(emi, origPC);
244 }
245};
246
247} // namespace X86ISA
248
249#endif // __ARCH_X86_DECODER_HH__
| 232
233 StaticInstPtr
234 decode(X86ISA::PCState &nextPC)
235 {
236 if (!instDone)
237 return NULL;
238 instDone = false;
239 updateNPC(nextPC);
240 return decode(emi, origPC);
241 }
242};
243
244} // namespace X86ISA
245
246#endif // __ARCH_X86_DECODER_HH__
|