1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "arch/x86/cpuid.hh"
32#include "base/bitfield.hh"
33#include "cpu/thread_context.hh"
34
35namespace X86ISA {
36 enum StandardCpuidFunction {
37 VendorAndLargestStdFunc,
38 FamilyModelStepping,
39 NumStandardCpuidFuncs
40 };
41
42 enum ExtendedCpuidFunctions {
43 VendorAndLargestExtFunc,
44 FamilyModelSteppingBrandFeatures,
45 NameString1,
46 NameString2,
47 NameString3,
48 L1CacheAndTLB,
49 L2L3CacheAndL2TLB,
50 APMInfo,
| 1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "arch/x86/cpuid.hh"
32#include "base/bitfield.hh"
33#include "cpu/thread_context.hh"
34
35namespace X86ISA {
36 enum StandardCpuidFunction {
37 VendorAndLargestStdFunc,
38 FamilyModelStepping,
39 NumStandardCpuidFuncs
40 };
41
42 enum ExtendedCpuidFunctions {
43 VendorAndLargestExtFunc,
44 FamilyModelSteppingBrandFeatures,
45 NameString1,
46 NameString2,
47 NameString3,
48 L1CacheAndTLB,
49 L2L3CacheAndL2TLB,
50 APMInfo,
|
| 51 LongModeAddressSize,
|
51
52 /*
53 * The following are defined by the spec but not yet implemented
54 */
| 52
53 /*
54 * The following are defined by the spec but not yet implemented
55 */
|
55/* LongModeAddressSize,
56 // Function 9 is reserved
| 56/* // Function 9 is reserved
|
57 SVMInfo = 10,
58 // Functions 11-24 are reserved
59 TLB1GBPageInfo = 25,
60 PerformanceInfo,*/
61
62 NumExtendedCpuidFuncs
63 };
64
65 static const int vendorStringSize = 13;
66 static const char vendorString[vendorStringSize] = "M5 Simulator";
67 static const int nameStringSize = 48;
68 static const char nameString[nameStringSize] = "Fake M5 x86_64 CPU";
69
70 uint64_t
71 stringToRegister(const char *str)
72 {
73 uint64_t reg = 0;
74 for (int pos = 3; pos >=0; pos--) {
75 reg <<= 8;
76 reg |= str[pos];
77 }
78 return reg;
79 }
80
81 bool
82 doCpuid(ThreadContext * tc, uint32_t function,
83 uint32_t index, CpuidResult &result)
84 {
85 uint16_t family = bits(function, 31, 16);
86 uint16_t funcNum = bits(function, 15, 0);
87 if (family == 0x8000) {
88 // The extended functions
89 switch (funcNum) {
90 case VendorAndLargestExtFunc:
91 assert(vendorStringSize >= 12);
92 result = CpuidResult(
93 0x80000000 + NumExtendedCpuidFuncs - 1,
94 stringToRegister(vendorString),
95 stringToRegister(vendorString + 4),
96 stringToRegister(vendorString + 8));
97 break;
98 case FamilyModelSteppingBrandFeatures:
99 result = CpuidResult(0x00020f51, 0x00000405,
100 0xe3d3fbff, 0x00000001);
101 break;
102 case NameString1:
103 case NameString2:
104 case NameString3:
105 {
106 // Zero fill anything beyond the end of the string. This
107 // should go away once the string is a vetted parameter.
108 char cleanName[nameStringSize];
109 memset(cleanName, '\0', nameStringSize);
110 strncpy(cleanName, nameString, nameStringSize);
111
112 int offset = (funcNum - NameString1) * 16;
113 assert(nameStringSize >= offset + 16);
114 result = CpuidResult(
115 stringToRegister(cleanName + offset + 0),
116 stringToRegister(cleanName + offset + 4),
117 stringToRegister(cleanName + offset + 12),
118 stringToRegister(cleanName + offset + 8));
119 }
120 break;
121 case L1CacheAndTLB:
122 result = CpuidResult(0xff08ff08, 0xff20ff20,
123 0x40020140, 0x40020140);
124 break;
125 case L2L3CacheAndL2TLB:
126 result = CpuidResult(0x00000000, 0x42004200,
127 0x00000000, 0x04008140);
128 break;
129 case APMInfo:
130 result = CpuidResult(0x80000018, 0x68747541,
131 0x69746e65, 0x444d4163);
132 break;
| 57 SVMInfo = 10,
58 // Functions 11-24 are reserved
59 TLB1GBPageInfo = 25,
60 PerformanceInfo,*/
61
62 NumExtendedCpuidFuncs
63 };
64
65 static const int vendorStringSize = 13;
66 static const char vendorString[vendorStringSize] = "M5 Simulator";
67 static const int nameStringSize = 48;
68 static const char nameString[nameStringSize] = "Fake M5 x86_64 CPU";
69
70 uint64_t
71 stringToRegister(const char *str)
72 {
73 uint64_t reg = 0;
74 for (int pos = 3; pos >=0; pos--) {
75 reg <<= 8;
76 reg |= str[pos];
77 }
78 return reg;
79 }
80
81 bool
82 doCpuid(ThreadContext * tc, uint32_t function,
83 uint32_t index, CpuidResult &result)
84 {
85 uint16_t family = bits(function, 31, 16);
86 uint16_t funcNum = bits(function, 15, 0);
87 if (family == 0x8000) {
88 // The extended functions
89 switch (funcNum) {
90 case VendorAndLargestExtFunc:
91 assert(vendorStringSize >= 12);
92 result = CpuidResult(
93 0x80000000 + NumExtendedCpuidFuncs - 1,
94 stringToRegister(vendorString),
95 stringToRegister(vendorString + 4),
96 stringToRegister(vendorString + 8));
97 break;
98 case FamilyModelSteppingBrandFeatures:
99 result = CpuidResult(0x00020f51, 0x00000405,
100 0xe3d3fbff, 0x00000001);
101 break;
102 case NameString1:
103 case NameString2:
104 case NameString3:
105 {
106 // Zero fill anything beyond the end of the string. This
107 // should go away once the string is a vetted parameter.
108 char cleanName[nameStringSize];
109 memset(cleanName, '\0', nameStringSize);
110 strncpy(cleanName, nameString, nameStringSize);
111
112 int offset = (funcNum - NameString1) * 16;
113 assert(nameStringSize >= offset + 16);
114 result = CpuidResult(
115 stringToRegister(cleanName + offset + 0),
116 stringToRegister(cleanName + offset + 4),
117 stringToRegister(cleanName + offset + 12),
118 stringToRegister(cleanName + offset + 8));
119 }
120 break;
121 case L1CacheAndTLB:
122 result = CpuidResult(0xff08ff08, 0xff20ff20,
123 0x40020140, 0x40020140);
124 break;
125 case L2L3CacheAndL2TLB:
126 result = CpuidResult(0x00000000, 0x42004200,
127 0x00000000, 0x04008140);
128 break;
129 case APMInfo:
130 result = CpuidResult(0x80000018, 0x68747541,
131 0x69746e65, 0x444d4163);
132 break;
|
133/* case LongModeAddressSize:
134 case SVMInfo:
| 133 case LongModeAddressSize:
134 result = CpuidResult(0x0000ffff, 0x00000000,
135 0x00000000, 0x00000000);
136 break;
137/* case SVMInfo:
|
135 case TLB1GBPageInfo:
136 case PerformanceInfo:*/
137 default:
138 warn("x86 cpuid: unimplemented function %u", funcNum);
139 return false;
140 }
141 } else if(family == 0x0000) {
142 // The standard functions
143 switch (funcNum) {
144 case VendorAndLargestStdFunc:
145 assert(vendorStringSize >= 12);
146 result = CpuidResult(
147 NumStandardCpuidFuncs - 1,
148 stringToRegister(vendorString),
149 stringToRegister(vendorString + 4),
150 stringToRegister(vendorString + 8));
151 break;
152 case FamilyModelStepping:
153 result = CpuidResult(0x00020f51, 0x00000805,
154 0xe7dbfbff, 0x00000001);
155 break;
156 default:
157 warn("x86 cpuid: unimplemented function %u", funcNum);
158 return false;
159 }
160 } else {
161 warn("x86 cpuid: unknown family %#x", family);
162 return false;
163 }
164
165 return true;
166 }
167} // namespace X86ISA
| 138 case TLB1GBPageInfo:
139 case PerformanceInfo:*/
140 default:
141 warn("x86 cpuid: unimplemented function %u", funcNum);
142 return false;
143 }
144 } else if(family == 0x0000) {
145 // The standard functions
146 switch (funcNum) {
147 case VendorAndLargestStdFunc:
148 assert(vendorStringSize >= 12);
149 result = CpuidResult(
150 NumStandardCpuidFuncs - 1,
151 stringToRegister(vendorString),
152 stringToRegister(vendorString + 4),
153 stringToRegister(vendorString + 8));
154 break;
155 case FamilyModelStepping:
156 result = CpuidResult(0x00020f51, 0x00000805,
157 0xe7dbfbff, 0x00000001);
158 break;
159 default:
160 warn("x86 cpuid: unimplemented function %u", funcNum);
161 return false;
162 }
163 } else {
164 warn("x86 cpuid: unknown family %#x", family);
165 return false;
166 }
167
168 return true;
169 }
170} // namespace X86ISA
|