1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2008 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Gabe Black
41 */
42
43#include "arch/x86/bios/smbios.hh"
44#include "arch/x86/isa_traits.hh"
45#include "base/types.hh"
46#include "mem/port_proxy.hh"
47#include "params/X86SMBiosBiosInformation.hh"
48#include "params/X86SMBiosSMBiosStructure.hh"
49#include "params/X86SMBiosSMBiosTable.hh"
50#include "sim/byteswap.hh"
51
52using namespace std;
53
54const char X86ISA::SMBios::SMBiosTable::SMBiosHeader::anchorString[] = "_SM_";
55const uint8_t X86ISA::SMBios::SMBiosTable::
56 SMBiosHeader::formattedArea[] = {0,0,0,0,0};
57const uint8_t X86ISA::SMBios::SMBiosTable::
58 SMBiosHeader::entryPointLength = 0x1F;
59const uint8_t X86ISA::SMBios::SMBiosTable::
60 SMBiosHeader::entryPointRevision = 0;
61const char X86ISA::SMBios::SMBiosTable::
62 SMBiosHeader::IntermediateHeader::anchorString[] = "_DMI_";
63
64template <class T>
65uint64_t
66composeBitVector(T vec)
67{
68 uint64_t val = 0;
69 typename T::iterator vecIt;
70 for (vecIt = vec.begin(); vecIt != vec.end(); vecIt++) {
71 val |= (1 << (*vecIt));
72 }
73 return val;
74}
75
76uint16_t
77X86ISA::SMBios::SMBiosStructure::writeOut(PortProxy& proxy, Addr addr)
78{
79 proxy.writeBlob(addr, (uint8_t *)(&type), 1);
80
81 uint8_t length = getLength();
82 proxy.writeBlob(addr + 1, (uint8_t *)(&length), 1);
83
84 uint16_t handleGuest = X86ISA::htog(handle);
85 proxy.writeBlob(addr + 2, (uint8_t *)(&handleGuest), 2);
86
87 return length + getStringLength();
88}
89
90X86ISA::SMBios::SMBiosStructure::SMBiosStructure(Params * p, uint8_t _type) :
91 SimObject(p), type(_type), handle(0), stringFields(false)
92{}
93
94void
95X86ISA::SMBios::SMBiosStructure::writeOutStrings(
96 PortProxy& proxy, Addr addr)
97{
98 std::vector<std::string>::iterator it;
99 Addr offset = 0;
100
101 const uint8_t nullTerminator = 0;
102
103 // If there are string fields but none of them are used, that's a
104 // special case which is handled by this if.
105 if (strings.size() == 0 && stringFields) {
106 proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
107 offset++;
108 } else {
109 for (it = strings.begin(); it != strings.end(); it++) {
110 proxy.writeBlob(addr + offset,
111 (uint8_t *)it->c_str(), it->length() + 1);
112 offset += it->length() + 1;
113 }
114 }
115 proxy.writeBlob(addr + offset, (uint8_t *)(&nullTerminator), 1);
116}
117
118int
119X86ISA::SMBios::SMBiosStructure::getStringLength()
120{
121 int size = 0;
122 std::vector<std::string>::iterator it;
123
124 for (it = strings.begin(); it != strings.end(); it++) {
125 size += it->length() + 1;
126 }
127
128 return size + 1;
129}
130
131int
132X86ISA::SMBios::SMBiosStructure::addString(string & newString)
133{
134 stringFields = true;
135 // If a string is empty, treat it as not existing. The index for empty
136 // strings is 0.
137 if (newString.length() == 0)
138 return 0;
139 strings.push_back(newString);
140 return strings.size();
141}
142
143string
144X86ISA::SMBios::SMBiosStructure::readString(int n)
145{
146 assert(n > 0 && n <= strings.size());
147 return strings[n - 1];
148}
149
150void
151X86ISA::SMBios::SMBiosStructure::setString(int n, std::string & newString)
152{
153 assert(n > 0 && n <= strings.size());
154 strings[n - 1] = newString;
155}
156
157X86ISA::SMBios::BiosInformation::BiosInformation(Params * p) :
158 SMBiosStructure(p, Type),
159 startingAddrSegment(p->starting_addr_segment),
160 romSize(p->rom_size),
161 majorVer(p->major), minorVer(p->minor),
162 embContFirmwareMajor(p->emb_cont_firmware_major),
163 embContFirmwareMinor(p->emb_cont_firmware_minor)
164 {
165 vendor = addString(p->vendor);
166 version = addString(p->version);
167 releaseDate = addString(p->release_date);
168
169 characteristics = composeBitVector(p->characteristics);
170 characteristicExtBytes =
171 composeBitVector(p->characteristic_ext_bytes);
172 }
173
174uint16_t
175X86ISA::SMBios::BiosInformation::writeOut(PortProxy& proxy, Addr addr)
176{
177 uint8_t size = SMBiosStructure::writeOut(proxy, addr);
178
179 proxy.writeBlob(addr + 0x4, (uint8_t *)(&vendor), 1);
180 proxy.writeBlob(addr + 0x5, (uint8_t *)(&version), 1);
181
182 uint16_t startingAddrSegmentGuest = X86ISA::htog(startingAddrSegment);
183 proxy.writeBlob(addr + 0x6, (uint8_t *)(&startingAddrSegmentGuest), 2);
184
185 proxy.writeBlob(addr + 0x8, (uint8_t *)(&releaseDate), 1);
186 proxy.writeBlob(addr + 0x9, (uint8_t *)(&romSize), 1);
187
188 uint64_t characteristicsGuest = X86ISA::htog(characteristics);
189 proxy.writeBlob(addr + 0xA, (uint8_t *)(&characteristicsGuest), 8);
190
191 uint16_t characteristicExtBytesGuest =
192 X86ISA::htog(characteristicExtBytes);
193 proxy.writeBlob(addr + 0x12, (uint8_t *)(&characteristicExtBytesGuest), 2);
194
195 proxy.writeBlob(addr + 0x14, (uint8_t *)(&majorVer), 1);
196 proxy.writeBlob(addr + 0x15, (uint8_t *)(&minorVer), 1);
197 proxy.writeBlob(addr + 0x16, (uint8_t *)(&embContFirmwareMajor), 1);
198 proxy.writeBlob(addr + 0x17, (uint8_t *)(&embContFirmwareMinor), 1);
199
200 writeOutStrings(proxy, addr + getLength());
201
202 return size;
203}
204
205X86ISA::SMBios::SMBiosTable::SMBiosTable(Params * p) :
206 SimObject(p), structures(p->structures)
207{
208 smbiosHeader.majorVersion = p->major_version;
209 smbiosHeader.minorVersion = p->minor_version;
210 assert(p->major_version <= 9);
211 assert(p->minor_version <= 9);
212 smbiosHeader.intermediateHeader.smbiosBCDRevision =
213 (p->major_version << 4) | p->minor_version;
214}
215
216void
217X86ISA::SMBios::SMBiosTable::writeOut(PortProxy& proxy, Addr addr,
218 Addr &headerSize, Addr &structSize)
219{
220 headerSize = 0x1F;
221
222 /*
223 * The main header
224 */
225 uint8_t mainChecksum = 0;
226
227 proxy.writeBlob(addr, (uint8_t *)smbiosHeader.anchorString, 4);
228 for (int i = 0; i < 4; i++)
229 mainChecksum += smbiosHeader.anchorString[i];
230
231 // The checksum goes here, but we're figuring it out as we go.
232
233 proxy.writeBlob(addr + 0x5,
234 (uint8_t *)(&smbiosHeader.entryPointLength), 1);
235 mainChecksum += smbiosHeader.entryPointLength;
236 proxy.writeBlob(addr + 0x6,
237 (uint8_t *)(&smbiosHeader.majorVersion), 1);
238 mainChecksum += smbiosHeader.majorVersion;
239 proxy.writeBlob(addr + 0x7,
240 (uint8_t *)(&smbiosHeader.minorVersion), 1);
241 mainChecksum += smbiosHeader.minorVersion;
242 // Maximum structure size goes here, but we'll figure it out later.
243 proxy.writeBlob(addr + 0xA,
244 (uint8_t *)(&smbiosHeader.entryPointRevision), 1);
245 mainChecksum += smbiosHeader.entryPointRevision;
246 proxy.writeBlob(addr + 0xB,
247 (uint8_t *)(&smbiosHeader.formattedArea), 5);
248 for (int i = 0; i < 5; i++)
249 mainChecksum += smbiosHeader.formattedArea[i];
250
251 /*
252 * The intermediate header
253 */
254 uint8_t intChecksum = 0;
255
256 proxy.writeBlob(addr + 0x10,
257 (uint8_t *)smbiosHeader.intermediateHeader.anchorString, 5);
258 for (int i = 0; i < 5; i++)
259 intChecksum += smbiosHeader.intermediateHeader.anchorString[i];
260
261 // The checksum goes here, but we're figuring it out as we go.
262 // Then the length of the structure table which we'll find later
263
264 uint32_t tableAddrGuest =
265 X86ISA::htog(smbiosHeader.intermediateHeader.tableAddr);
266 proxy.writeBlob(addr + 0x18, (uint8_t *)(&tableAddrGuest), 4);
267 for (int i = 0; i < 4; i++) {
268 intChecksum += tableAddrGuest;
269 tableAddrGuest >>= 8;
270 }
271
272 uint16_t numStructs = X86ISA::gtoh(structures.size());
273 proxy.writeBlob(addr + 0x1C, (uint8_t *)(&numStructs), 2);
274 for (int i = 0; i < 2; i++) {
275 intChecksum += numStructs;
276 numStructs >>= 8;
277 }
278
279 proxy.writeBlob(addr + 0x1E,
280 (uint8_t *)(&smbiosHeader.intermediateHeader.smbiosBCDRevision),
281 1);
282 intChecksum += smbiosHeader.intermediateHeader.smbiosBCDRevision;
283
284 /*
285 * Structure table
286 */
287
288 Addr base = smbiosHeader.intermediateHeader.tableAddr;
289 Addr offset = 0;
290 uint16_t maxSize = 0;
291 std::vector<SMBiosStructure *>::iterator it;
292 for (it = structures.begin(); it != structures.end(); it++) {
293 uint16_t size = (*it)->writeOut(proxy, base + offset);
294 if (size > maxSize)
295 maxSize = size;
296 offset += size;
297 }
298
299 structSize = offset;
300
301 /*
302 * Header
303 */
304
305 maxSize = X86ISA::htog(maxSize);
306 proxy.writeBlob(addr + 0x8, (uint8_t *)(&maxSize), 2);
307 for (int i = 0; i < 2; i++) {
308 mainChecksum += maxSize;
309 maxSize >>= 8;
310 }
311
312 // Set the checksum
313 mainChecksum = -mainChecksum;
314 proxy.writeBlob(addr + 0x4, (uint8_t *)(&mainChecksum), 1);
315
316 /*
317 * Intermediate header
318 */
319
320 uint16_t tableSize = offset;
321 tableSize = X86ISA::htog(tableSize);
322 proxy.writeBlob(addr + 0x16, (uint8_t *)(&tableSize), 2);
323 for (int i = 0; i < 2; i++) {
324 intChecksum += tableSize;
325 tableSize >>= 8;
326 }
327
328 intChecksum = -intChecksum;
329 proxy.writeBlob(addr + 0x15, (uint8_t *)(&intChecksum), 1);
330}
331
332X86ISA::SMBios::BiosInformation *
333X86SMBiosBiosInformationParams::create()
334{
335 return new X86ISA::SMBios::BiosInformation(this);
336}
337
338X86ISA::SMBios::SMBiosTable *
339X86SMBiosSMBiosTableParams::create()
340{
341 return new X86ISA::SMBios::SMBiosTable(this);
342}