intelmp.hh (8737:770ccf3af571) intelmp.hh (8852:c744483edfcf)
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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88 uint8_t specRev;
89 uint8_t defaultConfig;
90 bool imcrPresent;
91
92 static const char signature[];
93
94 public:
95
1/*
2 * Copyright (c) 2008 The Hewlett-Packard Development Company
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 79 unchanged lines hidden (view full) ---

88 uint8_t specRev;
89 uint8_t defaultConfig;
90 bool imcrPresent;
91
92 static const char signature[];
93
94 public:
95
96 Addr writeOut(PortProxy* proxy, Addr addr);
96 Addr writeOut(PortProxy& proxy, Addr addr);
97
98 Addr getTableAddr()
99 {
100 return tableAddr;
101 }
102
103 void setTableAddr(Addr addr)
104 {

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112{
113 protected:
114 typedef X86IntelMPBaseConfigEntryParams Params;
115
116 uint8_t type;
117
118 public:
119
97
98 Addr getTableAddr()
99 {
100 return tableAddr;
101 }
102
103 void setTableAddr(Addr addr)
104 {

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112{
113 protected:
114 typedef X86IntelMPBaseConfigEntryParams Params;
115
116 uint8_t type;
117
118 public:
119
120 virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
120 virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
121
122 BaseConfigEntry(Params * p, uint8_t _type);
123};
124
125class ExtConfigEntry : public SimObject
126{
127 protected:
128 typedef X86IntelMPExtConfigEntryParams Params;
129
130 uint8_t type;
131 uint8_t length;
132
133 public:
134
121
122 BaseConfigEntry(Params * p, uint8_t _type);
123};
124
125class ExtConfigEntry : public SimObject
126{
127 protected:
128 typedef X86IntelMPExtConfigEntryParams Params;
129
130 uint8_t type;
131 uint8_t length;
132
133 public:
134
135 virtual Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
135 virtual Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
136
137 ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length);
138};
139
140class ConfigTable : public SimObject
141{
142 protected:
143 typedef X86IntelMPConfigTableParams Params;

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150 uint32_t oemTableAddr;
151 uint16_t oemTableSize;
152 uint32_t localApic;
153
154 std::vector<BaseConfigEntry *> baseEntries;
155 std::vector<ExtConfigEntry *> extEntries;
156
157 public:
136
137 ExtConfigEntry(Params * p, uint8_t _type, uint8_t _length);
138};
139
140class ConfigTable : public SimObject
141{
142 protected:
143 typedef X86IntelMPConfigTableParams Params;

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150 uint32_t oemTableAddr;
151 uint16_t oemTableSize;
152 uint32_t localApic;
153
154 std::vector<BaseConfigEntry *> baseEntries;
155 std::vector<ExtConfigEntry *> extEntries;
156
157 public:
158 Addr writeOut(PortProxy* proxy, Addr addr);
158 Addr writeOut(PortProxy& proxy, Addr addr);
159
160 ConfigTable(Params * p);
161};
162
163class Processor : public BaseConfigEntry
164{
165 protected:
166 typedef X86IntelMPProcessorParams Params;
167
168 uint8_t localApicID;
169 uint8_t localApicVersion;
170 uint8_t cpuFlags;
171 uint32_t cpuSignature;
172 uint32_t featureFlags;
173
174 public:
159
160 ConfigTable(Params * p);
161};
162
163class Processor : public BaseConfigEntry
164{
165 protected:
166 typedef X86IntelMPProcessorParams Params;
167
168 uint8_t localApicID;
169 uint8_t localApicVersion;
170 uint8_t cpuFlags;
171 uint32_t cpuSignature;
172 uint32_t featureFlags;
173
174 public:
175 Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
175 Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
176
177 Processor(Params * p);
178};
179
180class Bus : public BaseConfigEntry
181{
182 protected:
183 typedef X86IntelMPBusParams Params;
184
185 uint8_t busID;
186 std::string busType;
187
188 public:
176
177 Processor(Params * p);
178};
179
180class Bus : public BaseConfigEntry
181{
182 protected:
183 typedef X86IntelMPBusParams Params;
184
185 uint8_t busID;
186 std::string busType;
187
188 public:
189 Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
189 Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
190
191 Bus(Params * p);
192};
193
194class IOAPIC : public BaseConfigEntry
195{
196 protected:
197 typedef X86IntelMPIOAPICParams Params;
198
199 uint8_t id;
200 uint8_t version;
201 uint8_t flags;
202 uint32_t address;
203
204 public:
190
191 Bus(Params * p);
192};
193
194class IOAPIC : public BaseConfigEntry
195{
196 protected:
197 typedef X86IntelMPIOAPICParams Params;
198
199 uint8_t id;
200 uint8_t version;
201 uint8_t flags;
202 uint32_t address;
203
204 public:
205 Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
205 Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
206
207 IOAPIC(Params * p);
208};
209
210class IntAssignment : public BaseConfigEntry
211{
212 protected:
213 uint8_t interruptType;
214
215 uint16_t flags;
216
217 uint8_t sourceBusID;
218 uint8_t sourceBusIRQ;
219
220 uint8_t destApicID;
221 uint8_t destApicIntIn;
222
223 public:
206
207 IOAPIC(Params * p);
208};
209
210class IntAssignment : public BaseConfigEntry
211{
212 protected:
213 uint8_t interruptType;
214
215 uint16_t flags;
216
217 uint8_t sourceBusID;
218 uint8_t sourceBusIRQ;
219
220 uint8_t destApicID;
221 uint8_t destApicIntIn;
222
223 public:
224 Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
224 Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
225
226 IntAssignment(X86IntelMPBaseConfigEntryParams * p,
227 Enums::X86IntelMPInterruptType _interruptType,
228 Enums::X86IntelMPPolarity polarity,
229 Enums::X86IntelMPTriggerMode trigger,
230 uint8_t _type,
231 uint8_t _sourceBusID, uint8_t _sourceBusIRQ,
232 uint8_t _destApicID, uint8_t _destApicIntIn) :

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264 typedef X86IntelMPAddrSpaceMappingParams Params;
265
266 uint8_t busID;
267 uint8_t addrType;
268 uint64_t addr;
269 uint64_t addrLength;
270
271 public:
225
226 IntAssignment(X86IntelMPBaseConfigEntryParams * p,
227 Enums::X86IntelMPInterruptType _interruptType,
228 Enums::X86IntelMPPolarity polarity,
229 Enums::X86IntelMPTriggerMode trigger,
230 uint8_t _type,
231 uint8_t _sourceBusID, uint8_t _sourceBusIRQ,
232 uint8_t _destApicID, uint8_t _destApicIntIn) :

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264 typedef X86IntelMPAddrSpaceMappingParams Params;
265
266 uint8_t busID;
267 uint8_t addrType;
268 uint64_t addr;
269 uint64_t addrLength;
270
271 public:
272 Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
272 Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
273
274 AddrSpaceMapping(Params * p);
275};
276
277class BusHierarchy : public ExtConfigEntry
278{
279 protected:
280 typedef X86IntelMPBusHierarchyParams Params;
281
282 uint8_t busID;
283 uint8_t info;
284 uint8_t parentBus;
285
286 public:
273
274 AddrSpaceMapping(Params * p);
275};
276
277class BusHierarchy : public ExtConfigEntry
278{
279 protected:
280 typedef X86IntelMPBusHierarchyParams Params;
281
282 uint8_t busID;
283 uint8_t info;
284 uint8_t parentBus;
285
286 public:
287 Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
287 Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
288
289 BusHierarchy(Params * p);
290};
291
292class CompatAddrSpaceMod : public ExtConfigEntry
293{
294 protected:
295 typedef X86IntelMPCompatAddrSpaceModParams Params;
296
297 uint8_t busID;
298 uint8_t mod;
299 uint32_t rangeList;
300
301 public:
288
289 BusHierarchy(Params * p);
290};
291
292class CompatAddrSpaceMod : public ExtConfigEntry
293{
294 protected:
295 typedef X86IntelMPCompatAddrSpaceModParams Params;
296
297 uint8_t busID;
298 uint8_t mod;
299 uint32_t rangeList;
300
301 public:
302 Addr writeOut(PortProxy* proxy, Addr addr, uint8_t &checkSum);
302 Addr writeOut(PortProxy& proxy, Addr addr, uint8_t &checkSum);
303
304 CompatAddrSpaceMod(Params * p);
305};
306
307} //IntelMP
308
309} //X86ISA
310
311#endif
303
304 CompatAddrSpaceMod(Params * p);
305};
306
307} //IntelMP
308
309} //X86ISA
310
311#endif