X86TLB.py (6022:410194bb3049) X86TLB.py (6654:4c84e771cca7)
1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# Redistribution and use of this software in source and binary forms,
5# with or without modification, are permitted provided that the
6# following conditions are met:
7#
8# The software must be used only for Non-Commercial Use which means any

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48# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53#
54# Authors: Gabe Black
55
1# Copyright (c) 2007 The Hewlett-Packard Development Company
2# All rights reserved.
3#
4# Redistribution and use of this software in source and binary forms,
5# with or without modification, are permitted provided that the
6# following conditions are met:
7#
8# The software must be used only for Non-Commercial Use which means any

--- 39 unchanged lines hidden (view full) ---

48# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
49# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
50# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
51# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
52# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
53#
54# Authors: Gabe Black
55
56from MemObject import MemObject
56from m5.defines import buildEnv
57from m5.params import *
58from m5.proxy import *
57from m5.params import *
58from m5.proxy import *
59from m5 import build_env
59
60from BaseTLB import BaseTLB
60from BaseTLB import BaseTLB
61from MemObject import MemObject
61
62
62if build_env['FULL_SYSTEM']:
63if buildEnv['FULL_SYSTEM']:
63 class X86PagetableWalker(MemObject):
64 type = 'X86PagetableWalker'
65 cxx_class = 'X86ISA::Walker'
66 port = Port("Port for the hardware table walker")
67 system = Param.System(Parent.any, "system object")
68
69class X86TLB(BaseTLB):
70 type = 'X86TLB'
71 cxx_class = 'X86ISA::TLB'
72 size = Param.Int(64, "TLB size")
64 class X86PagetableWalker(MemObject):
65 type = 'X86PagetableWalker'
66 cxx_class = 'X86ISA::Walker'
67 port = Port("Port for the hardware table walker")
68 system = Param.System(Parent.any, "system object")
69
70class X86TLB(BaseTLB):
71 type = 'X86TLB'
72 cxx_class = 'X86ISA::TLB'
73 size = Param.Int(64, "TLB size")
73 if build_env['FULL_SYSTEM']:
74 if buildEnv['FULL_SYSTEM']:
74 walker = Param.X86PagetableWalker(\
75 X86PagetableWalker(), "page table walker")
75 walker = Param.X86PagetableWalker(\
76 X86PagetableWalker(), "page table walker")