X86TLB.py (5464:7eb7f0f5e79f) | X86TLB.py (5610:0e1e9c186769) |
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1# Copyright (c) 2007 The Hewlett-Packard Development Company 2# All rights reserved. 3# 4# Redistribution and use of this software in source and binary forms, 5# with or without modification, are permitted provided that the 6# following conditions are met: 7# 8# The software must be used only for Non-Commercial Use which means any --- 48 unchanged lines hidden (view full) --- 57from m5.SimObject import SimObject 58from m5.params import * 59from m5.proxy import * 60from m5 import build_env 61 62if build_env['FULL_SYSTEM']: 63 class X86PagetableWalker(MemObject): 64 type = 'X86PagetableWalker' | 1# Copyright (c) 2007 The Hewlett-Packard Development Company 2# All rights reserved. 3# 4# Redistribution and use of this software in source and binary forms, 5# with or without modification, are permitted provided that the 6# following conditions are met: 7# 8# The software must be used only for Non-Commercial Use which means any --- 48 unchanged lines hidden (view full) --- 57from m5.SimObject import SimObject 58from m5.params import * 59from m5.proxy import * 60from m5 import build_env 61 62if build_env['FULL_SYSTEM']: 63 class X86PagetableWalker(MemObject): 64 type = 'X86PagetableWalker' |
65 cxx_namespace = 'X86ISA' 66 cxx_class = 'Walker' | 65 cxx_class = 'X86ISA::Walker' |
67 port = Port("Port for the hardware table walker") 68 system = Param.System(Parent.any, "system object") 69 70class X86TLB(SimObject): 71 type = 'X86TLB' 72 abstract = True 73 size = Param.Int("TLB size") 74 if build_env['FULL_SYSTEM']: 75 walker = Param.X86PagetableWalker(\ 76 X86PagetableWalker(), "page table walker") 77 78class X86DTB(X86TLB): 79 type = 'X86DTB' | 66 port = Port("Port for the hardware table walker") 67 system = Param.System(Parent.any, "system object") 68 69class X86TLB(SimObject): 70 type = 'X86TLB' 71 abstract = True 72 size = Param.Int("TLB size") 73 if build_env['FULL_SYSTEM']: 74 walker = Param.X86PagetableWalker(\ 75 X86PagetableWalker(), "page table walker") 76 77class X86DTB(X86TLB): 78 type = 'X86DTB' |
80 cxx_namespace = 'X86ISA' 81 cxx_class = 'DTB' 82 | 79 cxx_class = 'X86ISA::DTB' |
83 size = 64 84 85class X86ITB(X86TLB): 86 type = 'X86ITB' | 80 size = 64 81 82class X86ITB(X86TLB): 83 type = 'X86ITB' |
87 cxx_namespace = 'X86ISA' 88 cxx_class = 'ITB' 89 | 84 cxx_class = 'X86ISA::ITB' |
90 size = 64 | 85 size = 64 |