SConscript (6316:51f3026d4cbb) SConscript (6329:5d8b91875859)
1# -*- mode:python -*-
2
3# Copyright (c) 2005-2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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94 Source('insts/microop.cc')
95 Source('insts/microregop.cc')
96 Source('insts/static_inst.cc')
97 Source('isa.cc')
98 Source('miscregfile.cc')
99 Source('pagetable.cc')
100 Source('predecoder.cc')
101 Source('predecoder_tables.cc')
1# -*- mode:python -*-
2
3# Copyright (c) 2005-2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 85 unchanged lines hidden (view full) ---

94 Source('insts/microop.cc')
95 Source('insts/microregop.cc')
96 Source('insts/static_inst.cc')
97 Source('isa.cc')
98 Source('miscregfile.cc')
99 Source('pagetable.cc')
100 Source('predecoder.cc')
101 Source('predecoder_tables.cc')
102 Source('regfile.cc')
103 Source('remote_gdb.cc')
104 Source('tlb.cc')
105 Source('utility.cc')
106
107 SimObject('X86TLB.py')
108 TraceFlag('Predecoder', "Predecoder debug output")
109 TraceFlag('X86', "Generic X86 ISA debugging")
110

--- 252 unchanged lines hidden --- 		102 Source('remote_gdb.cc')
103 Source('tlb.cc')
104 Source('utility.cc')
105
106 SimObject('X86TLB.py')
107 TraceFlag('Predecoder', "Predecoder debug output")
108 TraceFlag('X86', "Generic X86 ISA debugging")
109

--- 252 unchanged lines hidden ---