1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 34#include "arch/sparc/isa_traits.hh" 35#include "arch/sparc/registers.hh" 36#include "arch/sparc/tlb.hh" 37#include "base/misc.hh" 38#include "base/bitfield.hh" 39#include "cpu/static_inst.hh" 40#include "cpu/thread_context.hh" |
41#include "sim/fault_fwd.hh" |
42 43namespace SparcISA 44{ 45 46inline PCState 47buildRetPC(const PCState &curPC, const PCState &callPC) 48{ 49 PCState ret = callPC; --- 50 unchanged lines hidden --- |