46,53c46,53
< inline PCState
< buildRetPC(const PCState &curPC, const PCState &callPC)
< {
< PCState ret = callPC;
< ret.uEnd();
< ret.pc(curPC.npc());
< return ret;
< }
---
> inline PCState
> buildRetPC(const PCState &curPC, const PCState &callPC)
> {
> PCState ret = callPC;
> ret.uEnd();
> ret.pc(curPC.npc());
> return ret;
> }
55,56c55
< uint64_t
< getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
---
> uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp);
58,63c57,62
< static inline bool
< inUserMode(ThreadContext *tc)
< {
< return !((tc->readMiscRegNoEffect(MISCREG_PSTATE) & (1 << 2)) ||
< (tc->readMiscRegNoEffect(MISCREG_HPSTATE) & (1 << 2)));
< }
---
> static inline bool
> inUserMode(ThreadContext *tc)
> {
> return !((tc->readMiscRegNoEffect(MISCREG_PSTATE) & (1 << 2)) ||
> (tc->readMiscRegNoEffect(MISCREG_HPSTATE) & (1 << 2)));
> }
65,70c64,69
< /**
< * Function to insure ISA semantics about 0 registers.
< * @param tc The thread context.
< */
< template <class TC>
< void zeroRegisters(TC *tc);
---
> /**
> * Function to insure ISA semantics about 0 registers.
> * @param tc The thread context.
> */
> template <class TC>
> void zeroRegisters(TC *tc);
72c71
< void initCPU(ThreadContext *tc, int cpuId);
---
> void initCPU(ThreadContext *tc, int cpuId);
74,76c73,75
< inline void
< startupCPU(ThreadContext *tc, int cpuId)
< {
---
> inline void
> startupCPU(ThreadContext *tc, int cpuId)
> {
78,81c77,78
< // Other CPUs will get activated by IPIs
< if (cpuId == 0)
< tc->activate(0);
< #else
---
> // Other CPUs will get activated by IPIs
> if (cpuId == 0)
82a80,81
> #else
> tc->activate(0);
84c83
< }
---
> }
86c85
< void copyRegs(ThreadContext *src, ThreadContext *dest);
---
> void copyRegs(ThreadContext *src, ThreadContext *dest);
88c87
< void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
---
> void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
90c89
< void skipFunction(ThreadContext *tc);
---
> void skipFunction(ThreadContext *tc);
92,96c91,95
< inline void
< advancePC(PCState &pc, const StaticInstPtr inst)
< {
< inst->advancePC(pc);
< }
---
> inline void
> advancePC(PCState &pc, const StaticInstPtr inst)
> {
> inst->advancePC(pc);
> }