1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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208 // Then loop through the floating point registers.
209 for (int i = 0; i < SparcISA::NumFloatArchRegs; ++i) {
210 dest->setFloatRegBits(i, src->readFloatRegBits(i));
211 }
212
213 // Copy misc. registers
214 copyMiscRegs(src, dest);
215
216
217 // Lastly copy PC/NPC
218 dest->setPC(src->readPC());
219 dest->setNextPC(src->readNextPC());
220 dest->setNextNPC(src->readNextNPC());
221}
222
223void
224skipFunction(ThreadContext *tc)
225{
226 Addr newpc = tc->readIntReg(ReturnAddressReg);
227 tc->setPC(newpc);
228 tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst));
229 tc->setNextPC(tc->readNextPC() + sizeof(TheISA::MachInst));
230}
231
232
233void
234initCPU(ThreadContext *tc, int cpuId)
235{
236 static Fault por = new PowerOnReset();
237 if (cpuId == 0)
238 por->invoke(tc);
239}
240
241} //namespace SPARC_ISA