ua2005.cc (7741:340b6f01d69b) | ua2005.cc (7823:dac01f14f20f) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 97 unchanged lines hidden (view full) --- 106 tickCompare = new TickCompareEvent(this, tc); 107 setMiscRegNoEffect(miscReg, val); 108 if ((tick_cmpr & ~mask(63)) && tickCompare->scheduled()) 109 cpu->deschedule(tickCompare); 110 time = (tick_cmpr & mask(63)) - (tick & mask(63)); 111 if (!(tick_cmpr & ~mask(63)) && time > 0) { 112 if (tickCompare->scheduled()) 113 cpu->deschedule(tickCompare); | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 97 unchanged lines hidden (view full) --- 106 tickCompare = new TickCompareEvent(this, tc); 107 setMiscRegNoEffect(miscReg, val); 108 if ((tick_cmpr & ~mask(63)) && tickCompare->scheduled()) 109 cpu->deschedule(tickCompare); 110 time = (tick_cmpr & mask(63)) - (tick & mask(63)); 111 if (!(tick_cmpr & ~mask(63)) && time > 0) { 112 if (tickCompare->scheduled()) 113 cpu->deschedule(tickCompare); |
114 cpu->schedule(tickCompare, curTick + time * cpu->ticks(1)); | 114 cpu->schedule(tickCompare, curTick() + time * cpu->ticks(1)); |
115 } 116 panic("writing to TICK compare register %#X\n", val); 117 break; 118 119 case MISCREG_STICK_CMPR: 120 if (sTickCompare == NULL) 121 sTickCompare = new STickCompareEvent(this, tc); 122 setMiscRegNoEffect(miscReg, val); 123 if ((stick_cmpr & ~mask(63)) && sTickCompare->scheduled()) 124 cpu->deschedule(sTickCompare); 125 time = ((int64_t)(stick_cmpr & mask(63)) - (int64_t)stick) - 126 cpu->instCount(); 127 if (!(stick_cmpr & ~mask(63)) && time > 0) { 128 if (sTickCompare->scheduled()) 129 cpu->deschedule(sTickCompare); | 115 } 116 panic("writing to TICK compare register %#X\n", val); 117 break; 118 119 case MISCREG_STICK_CMPR: 120 if (sTickCompare == NULL) 121 sTickCompare = new STickCompareEvent(this, tc); 122 setMiscRegNoEffect(miscReg, val); 123 if ((stick_cmpr & ~mask(63)) && sTickCompare->scheduled()) 124 cpu->deschedule(sTickCompare); 125 time = ((int64_t)(stick_cmpr & mask(63)) - (int64_t)stick) - 126 cpu->instCount(); 127 if (!(stick_cmpr & ~mask(63)) && time > 0) { 128 if (sTickCompare->scheduled()) 129 cpu->deschedule(sTickCompare); |
130 cpu->schedule(sTickCompare, curTick + time * cpu->ticks(1)); | 130 cpu->schedule(sTickCompare, curTick() + time * cpu->ticks(1)); |
131 } 132 DPRINTF(Timer, "writing to sTICK compare register value %#X\n", val); 133 break; 134 135 case MISCREG_PSTATE: 136 setMiscRegNoEffect(miscReg, val); 137 138 case MISCREG_PIL: --- 53 unchanged lines hidden (view full) --- 192 setMiscRegNoEffect(miscReg, val); 193 if ((hstick_cmpr & ~mask(63)) && hSTickCompare->scheduled()) 194 cpu->deschedule(hSTickCompare); 195 time = ((int64_t)(hstick_cmpr & mask(63)) - (int64_t)stick) - 196 cpu->instCount(); 197 if (!(hstick_cmpr & ~mask(63)) && time > 0) { 198 if (hSTickCompare->scheduled()) 199 cpu->deschedule(hSTickCompare); | 131 } 132 DPRINTF(Timer, "writing to sTICK compare register value %#X\n", val); 133 break; 134 135 case MISCREG_PSTATE: 136 setMiscRegNoEffect(miscReg, val); 137 138 case MISCREG_PIL: --- 53 unchanged lines hidden (view full) --- 192 setMiscRegNoEffect(miscReg, val); 193 if ((hstick_cmpr & ~mask(63)) && hSTickCompare->scheduled()) 194 cpu->deschedule(hSTickCompare); 195 time = ((int64_t)(hstick_cmpr & mask(63)) - (int64_t)stick) - 196 cpu->instCount(); 197 if (!(hstick_cmpr & ~mask(63)) && time > 0) { 198 if (hSTickCompare->scheduled()) 199 cpu->deschedule(hSTickCompare); |
200 cpu->schedule(hSTickCompare, curTick + time * cpu->ticks(1)); | 200 cpu->schedule(hSTickCompare, curTick() + time * cpu->ticks(1)); |
201 } 202 DPRINTF(Timer, "writing to hsTICK compare register value %#X\n", val); 203 break; 204 205 case MISCREG_HPSTATE: 206 // T1000 spec says impl. dependent val must always be 1 207 setMiscRegNoEffect(miscReg, val | HPSTATE::id); 208#if FULL_SYSTEM --- 121 unchanged lines hidden (view full) --- 330 331 if (ticks == 0 || tc->status() == ThreadContext::Suspended) { 332 DPRINTF(Timer, "STick compare cycle reached at %#x\n", 333 (stick_cmpr & mask(63))); 334 if (!(tc->readMiscRegNoEffect(MISCREG_STICK_CMPR) & (ULL(1) << 63))) { 335 setMiscReg(MISCREG_SOFTINT, softint | (ULL(1) << 16), tc); 336 } 337 } else { | 201 } 202 DPRINTF(Timer, "writing to hsTICK compare register value %#X\n", val); 203 break; 204 205 case MISCREG_HPSTATE: 206 // T1000 spec says impl. dependent val must always be 1 207 setMiscRegNoEffect(miscReg, val | HPSTATE::id); 208#if FULL_SYSTEM --- 121 unchanged lines hidden (view full) --- 330 331 if (ticks == 0 || tc->status() == ThreadContext::Suspended) { 332 DPRINTF(Timer, "STick compare cycle reached at %#x\n", 333 (stick_cmpr & mask(63))); 334 if (!(tc->readMiscRegNoEffect(MISCREG_STICK_CMPR) & (ULL(1) << 63))) { 335 setMiscReg(MISCREG_SOFTINT, softint | (ULL(1) << 16), tc); 336 } 337 } else { |
338 cpu->schedule(sTickCompare, curTick + ticks * cpu->ticks(1)); | 338 cpu->schedule(sTickCompare, curTick() + ticks * cpu->ticks(1)); |
339 } 340} 341 342void 343ISA::processHSTickCompare(ThreadContext *tc) 344{ 345 BaseCPU *cpu = tc->getCpuPtr(); 346 --- 11 unchanged lines hidden (view full) --- 358 if (ticks == 0 || tc->status() == ThreadContext::Suspended) { 359 DPRINTF(Timer, "HSTick compare cycle reached at %#x\n", 360 (stick_cmpr & mask(63))); 361 if (!(tc->readMiscRegNoEffect(MISCREG_HSTICK_CMPR) & (ULL(1) << 63))) { 362 setMiscReg(MISCREG_HINTP, 1, tc); 363 } 364 // Need to do something to cause interrupt to happen here !!! @todo 365 } else { | 339 } 340} 341 342void 343ISA::processHSTickCompare(ThreadContext *tc) 344{ 345 BaseCPU *cpu = tc->getCpuPtr(); 346 --- 11 unchanged lines hidden (view full) --- 358 if (ticks == 0 || tc->status() == ThreadContext::Suspended) { 359 DPRINTF(Timer, "HSTick compare cycle reached at %#x\n", 360 (stick_cmpr & mask(63))); 361 if (!(tc->readMiscRegNoEffect(MISCREG_HSTICK_CMPR) & (ULL(1) << 63))) { 362 setMiscReg(MISCREG_HINTP, 1, tc); 363 } 364 // Need to do something to cause interrupt to happen here !!! @todo 365 } else { |
366 cpu->schedule(hSTickCompare, curTick + ticks * cpu->ticks(1)); | 366 cpu->schedule(hSTickCompare, curTick() + ticks * cpu->ticks(1)); |
367 } 368} 369 | 367 } 368} 369 |