1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 243 unchanged lines hidden (view full) --- 252 case MISCREG_STRAND_STS_REG: 253 System *sys; 254 int x; 255 sys = tc->getSystemPtr(); 256 257 temp = readRegNoEffect(miscReg) & (STS::active | STS::speculative); 258 // Check that the CPU array is fully populated 259 // (by calling getNumCPus()) |
260 assert(sys->numContexts() > tc->contextId()); |
261 262 temp |= tc->contextId() << STS::shft_id; 263 264 for (x = tc->contextId() & ~3; x < sys->threadContexts.size(); x++) { 265 switch (sys->threadContexts[x]->status()) { 266 case ThreadContext::Active: 267 temp |= STS::st_run << (STS::shft_fsm0 - 268 ((x & 0x3) * (STS::shft_fsm0-STS::shft_fsm1))); --- 78 unchanged lines hidden --- |