1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 21 unchanged lines hidden (view full) --- 30#include "arch/sparc/kernel_stats.hh" 31#include "arch/sparc/registers.hh" 32#include "base/bitfield.hh" 33#include "base/trace.hh" 34#include "cpu/base.hh" 35#include "cpu/thread_context.hh" 36#include "debug/Quiesce.hh" 37#include "debug/Timer.hh" |
38#include "sim/full_system.hh" |
39#include "sim/system.hh" |
40 41using namespace SparcISA; 42using namespace std; 43 44 45void 46ISA::checkSoftInt(ThreadContext *tc) 47{ --- 328 unchanged lines hidden --- |