1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_SPARC_TYPES_HH__
32#define __ARCH_SPARC_TYPES_HH__
33
34#include "base/bigint.hh"
35#include "base/types.hh"
36#include "arch/generic/types.hh"
37
38namespace SparcISA
39{
40 typedef uint32_t MachInst;
41 typedef uint64_t ExtMachInst;
42
43 typedef GenericISA::DelaySlotUPCState<MachInst> PCState;
44
45 typedef Twin64_t LargestRead;
46
47 struct CoreSpecific {
48 int core_type;
49 };
50}
51
52#endif