tlb.hh (5891:73084c6bb183) tlb.hh (5894:8091ac99341a)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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172{
173 public:
174 typedef SparcITBParams Params;
175 ITB(const Params *p) : TLB(p)
176 {
177 cacheEntry = NULL;
178 }
179
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 163 unchanged lines hidden (view full) ---

172{
173 public:
174 typedef SparcITBParams Params;
175 ITB(const Params *p) : TLB(p)
176 {
177 cacheEntry = NULL;
178 }
179
180 Fault translateAtomic(RequestPtr &req, ThreadContext *tc);
180 Fault translateAtomic(RequestPtr req, ThreadContext *tc);
181 void translateTiming(RequestPtr req, ThreadContext *tc,
182 Translation *translation);
181 private:
182 void writeSfsr(bool write, ContextType ct,
183 bool se, FaultTypes ft, int asi);
184 TlbEntry *cacheEntry;
185 friend class DTB;
186};
187
188class DTB : public TLB

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194 typedef SparcDTBParams Params;
195 DTB(const Params *p) : TLB(p)
196 {
197 sfar = 0;
198 cacheEntry[0] = NULL;
199 cacheEntry[1] = NULL;
200 }
201
183 private:
184 void writeSfsr(bool write, ContextType ct,
185 bool se, FaultTypes ft, int asi);
186 TlbEntry *cacheEntry;
187 friend class DTB;
188};
189
190class DTB : public TLB

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196 typedef SparcDTBParams Params;
197 DTB(const Params *p) : TLB(p)
198 {
199 sfar = 0;
200 cacheEntry[0] = NULL;
201 cacheEntry[1] = NULL;
202 }
203
202 Fault translateAtomic(RequestPtr &req, ThreadContext *tc, bool write);
204 Fault translateAtomic(RequestPtr req,
205 ThreadContext *tc, bool write=false);
206 void translateTiming(RequestPtr req, ThreadContext *tc,
207 Translation *translation, bool write=false);
203#if FULL_SYSTEM
204 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
205 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
206#endif
207 void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);
208
209 // Checkpointing
210 virtual void serialize(std::ostream &os);

--- 17 unchanged lines hidden --- 		208#if FULL_SYSTEM
209 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
210 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
211#endif
212 void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);
213
214 // Checkpointing
215 virtual void serialize(std::ostream &os);

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