1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 132 unchanged lines hidden (view full) --- 141 void writeSfsr(bool write, ContextType ct, 142 bool se, FaultTypes ft, int asi); 143 144 void clearUsedBits(); 145 146 147 void writeTagAccess(Addr va, int context); 148 |
149 Fault translateInst(const RequestPtr &req, ThreadContext *tc); 150 Fault translateData(const RequestPtr &req, ThreadContext *tc, bool write); |
151 152 public: 153 typedef SparcTLBParams Params; 154 TLB(const Params *p); 155 156 void takeOverFrom(BaseTLB *otlb) override {} 157 158 void 159 demapPage(Addr vaddr, uint64_t asn) override 160 { 161 panic("demapPage(Addr) is not implemented.\n"); 162 } 163 164 void dumpAll(); 165 166 Fault translateAtomic( |
167 const RequestPtr &req, ThreadContext *tc, Mode mode) override; |
168 void translateTiming( |
169 const RequestPtr &req, ThreadContext *tc, |
170 Translation *translation, Mode mode) override; 171 Fault finalizePhysical( |
172 const RequestPtr &req, 173 ThreadContext *tc, Mode mode) const override; |
174 Cycles doMmuRegRead(ThreadContext *tc, Packet *pkt); 175 Cycles doMmuRegWrite(ThreadContext *tc, Packet *pkt); 176 void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs); 177 178 // Checkpointing 179 void serialize(CheckpointOut &cp) const override; 180 void unserialize(CheckpointIn &cp) override; 181 --- 18 unchanged lines hidden --- |