1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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41class ThreadContext;
42class Packet;
43
44namespace SparcISA
45{
46
47class TLB : public SimObject
48{
49 protected:
50 TlbMap lookupTable;;
51 typedef TlbMap::iterator MapIter;
52
53 TlbEntry *tlb;
54
55 int size;
56 int usedEntries;
57 int lastReplaced;

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115
116 /** Remve all entries that match a certain partition id, (contextid), and
117 * va). */
118 void demapPage(Addr va, int partition_id, bool real, int context_id);
119
120 /** Checks if the virtual address provided is a valid one. */
121 bool validVirtualAddress(Addr va, bool am);
122
123 void writeSfsr(ThreadContext *tc, int reg, bool write, ContextType ct,
124 bool se, FaultTypes ft, int asi);
125
126 void clearUsedBits();
127
128
129 void writeTagAccess(ThreadContext *tc, int reg, Addr va, int context);
130
131 public:
132 TLB(const std::string &name, int size);
133
134 void dumpAll();
135
136 // Checkpointing
137 virtual void serialize(std::ostream &os);

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147 public:
148 ITB(const std::string &name, int size) : TLB(name, size)
149 {
150 cacheEntry = NULL;
151 }
152
153 Fault translate(RequestPtr &req, ThreadContext *tc);
154 private:
155 void writeSfsr(ThreadContext *tc, bool write, ContextType ct,
156 bool se, FaultTypes ft, int asi);
157 void writeTagAccess(ThreadContext *tc, Addr va, int context);
158 TlbEntry *cacheEntry;
159 friend class DTB;
160};
161
162class DTB : public TLB
163{
164 public:
165 DTB(const std::string &name, int size) : TLB(name, size)
166 {
167 cacheEntry[0] = NULL;
168 cacheEntry[1] = NULL;
169 }
170
171 Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
172 Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
173 Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
174 void GetTsbPtr(ThreadContext *tc, Addr addr, int ctx, Addr *ptrs);
175
176 private:
177 void writeSfr(ThreadContext *tc, Addr a, bool write, ContextType ct,
178 bool se, FaultTypes ft, int asi);
179 void writeTagAccess(ThreadContext *tc, Addr va, int context);
180
181 uint64_t MakeTsbPtr(TsbPageSize ps, uint64_t tag_access, uint64_t c0_tsb,
182 uint64_t c0_config, uint64_t cX_tsb, uint64_t cX_config);
183
184
185 TlbEntry *cacheEntry[2];
186 ASI cacheAsi[2];
187};
188
189}
190
191#endif // __ARCH_SPARC_TLB_HH__