remote_gdb.cc (10601:6efb37480d87) remote_gdb.cc (11274:d9a0136ab8cc)
1/*
1/*
2 * Copyright 2015 LabWare
2 * Copyright 2014 Google, Inc.
3 * Copyright (c) 2002-2005 The Regents of The University of Michigan
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;

--- 12 unchanged lines hidden (view full) ---

22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Nathan Binkert
3 * Copyright 2014 Google, Inc.
4 * Copyright (c) 2002-2005 The Regents of The University of Michigan
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;

--- 12 unchanged lines hidden (view full) ---

23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * Authors: Nathan Binkert
31 * Boris Shingarov
30 */
31
32/*
33 * Copyright (c) 1990, 1993 The Regents of the University of California
34 * All rights reserved
35 *
36 * This software was developed by the Computer Systems Engineering group
37 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and

--- 88 unchanged lines hidden (view full) ---

126#include "arch/sparc/remote_gdb.hh"
127#include "arch/vtophys.hh"
128#include "base/intmath.hh"
129#include "base/remote_gdb.hh"
130#include "base/socket.hh"
131#include "base/trace.hh"
132#include "cpu/static_inst.hh"
133#include "cpu/thread_context.hh"
32 */
33
34/*
35 * Copyright (c) 1990, 1993 The Regents of the University of California
36 * All rights reserved
37 *
38 * This software was developed by the Computer Systems Engineering group
39 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and

--- 88 unchanged lines hidden (view full) ---

128#include "arch/sparc/remote_gdb.hh"
129#include "arch/vtophys.hh"
130#include "base/intmath.hh"
131#include "base/remote_gdb.hh"
132#include "base/socket.hh"
133#include "base/trace.hh"
134#include "cpu/static_inst.hh"
135#include "cpu/thread_context.hh"
136#include "debug/GDBAcc.hh"
134#include "debug/GDBRead.hh"
135#include "mem/page_table.hh"
136#include "mem/physical.hh"
137#include "mem/port.hh"
138#include "sim/byteswap.hh"
139#include "sim/full_system.hh"
140#include "sim/process.hh"
141#include "sim/system.hh"
142
143using namespace std;
144using namespace SparcISA;
145
146RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
137#include "debug/GDBRead.hh"
138#include "mem/page_table.hh"
139#include "mem/physical.hh"
140#include "mem/port.hh"
141#include "sim/byteswap.hh"
142#include "sim/full_system.hh"
143#include "sim/process.hh"
144#include "sim/system.hh"
145
146using namespace std;
147using namespace SparcISA;
148
149RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
147 : BaseRemoteGDB(_system, c, NumGDBRegs * sizeof(uint64_t))
150 : BaseRemoteGDB(_system, c)
148{}
149
150///////////////////////////////////////////////////////////
151// RemoteGDB::acc
152//
153// Determine if the mapping at va..(va+len) is valid.
154//
155bool

--- 11 unchanged lines hidden (view full) ---

167 // Check to make sure the first byte is mapped into the processes
168 // address space.
169 if (context->getProcessPtr()->pTable->lookup(va, entry))
170 return true;
171 return false;
172 }
173}
174
151{}
152
153///////////////////////////////////////////////////////////
154// RemoteGDB::acc
155//
156// Determine if the mapping at va..(va+len) is valid.
157//
158bool

--- 11 unchanged lines hidden (view full) ---

170 // Check to make sure the first byte is mapped into the processes
171 // address space.
172 if (context->getProcessPtr()->pTable->lookup(va, entry))
173 return true;
174 return false;
175 }
176}
177
175///////////////////////////////////////////////////////////
176// RemoteGDB::getregs
177//
178// Translate the kernel debugger register format into
179// the GDB register format.
180void
178void
181RemoteGDB::getregs()
179RemoteGDB::SPARCGdbRegCache::getRegs(ThreadContext *context)
182{
180{
183 memset(gdbregs.regs, 0, gdbregs.size);
181 DPRINTF(GDBAcc, "getRegs in remotegdb \n");
182 for (int i = 0; i < 32; i++) r.gpr[i] = htobe((uint32_t)context->readIntReg(i));
183 PCState pc = context->pcState();
184 r.pc = htobe((uint32_t)pc.pc());
185 r.npc = htobe((uint32_t)pc.npc());
186 r.y = htobe((uint32_t)context->readIntReg(NumIntArchRegs + 1));
187 PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
188 r.psr = htobe((uint32_t)pstate);
189 r.fsr = htobe((uint32_t)context->readMiscReg(MISCREG_FSR));
190 r.csr = htobe((uint32_t)context->readIntReg(NumIntArchRegs + 2));
191}
184
192
193void
194RemoteGDB::SPARC64GdbRegCache::getRegs(ThreadContext *context)
195{
196 DPRINTF(GDBAcc, "getRegs in remotegdb \n");
197 for (int i = 0; i < 32; i++) r.gpr[i] = htobe(context->readIntReg(i));
198 for (int i = 0; i < 32; i++) r.fpr[i] = 0;
185 PCState pc = context->pcState();
199 PCState pc = context->pcState();
200 r.pc = htobe(pc.pc());
201 r.npc = htobe(pc.npc());
202 r.fsr = htobe(context->readMiscReg(MISCREG_FSR));
203 r.fprs = htobe(context->readMiscReg(MISCREG_FPRS));
204 r.y = htobe(context->readIntReg(NumIntArchRegs + 1));
186 PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
205 PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
206 r.state = htobe(
207 context->readMiscReg(MISCREG_CWP) |
208 pstate << 8 |
209 context->readMiscReg(MISCREG_ASI) << 24 |
210 context->readIntReg(NumIntArchRegs + 2) << 32);
211}
187
212
188 if (pstate.am) {
189 gdbregs.regs32[Reg32Pc] = htobe((uint32_t)pc.pc());
190 gdbregs.regs32[Reg32Npc] = htobe((uint32_t)pc.npc());
191 for (int x = RegG0; x <= RegI0 + 7; x++)
192 gdbregs.regs32[x] = htobe((uint32_t)context->readIntReg(x - RegG0));
193
194 gdbregs.regs32[Reg32Y] =
195 htobe((uint32_t)context->readIntReg(NumIntArchRegs + 1));
196 gdbregs.regs32[Reg32Psr] = htobe((uint32_t)pstate);
197 gdbregs.regs32[Reg32Fsr] =
198 htobe((uint32_t)context->readMiscReg(MISCREG_FSR));
199 gdbregs.regs32[Reg32Csr] =
200 htobe((uint32_t)context->readIntReg(NumIntArchRegs + 2));
201 } else {
202 gdbregs.regs64[RegPc] = htobe(pc.pc());
203 gdbregs.regs64[RegNpc] = htobe(pc.npc());
204 for (int x = RegG0; x <= RegI0 + 7; x++)
205 gdbregs.regs64[x] = htobe(context->readIntReg(x - RegG0));
206
207 gdbregs.regs64[RegFsr] = htobe(context->readMiscReg(MISCREG_FSR));
208 gdbregs.regs64[RegFprs] = htobe(context->readMiscReg(MISCREG_FPRS));
209 gdbregs.regs64[RegY] = htobe(context->readIntReg(NumIntArchRegs + 1));
210 gdbregs.regs64[RegState] = htobe(
211 context->readMiscReg(MISCREG_CWP) |
212 pstate << 8 |
213 context->readMiscReg(MISCREG_ASI) << 24 |
214 context->readIntReg(NumIntArchRegs + 2) << 32);
215 }
216
217 DPRINTF(GDBRead, "PC=%#x\n", gdbregs.regs64[RegPc]);
218
213void
214RemoteGDB::SPARCGdbRegCache::setRegs(ThreadContext *context) const
215{
216 for (int i = 0; i < 32; i++) context->setIntReg(i, r.gpr[i]);
217 PCState pc;
218 pc.pc(r.pc);
219 pc.npc(r.npc);
220 pc.nnpc(pc.npc() + sizeof(MachInst));
221 pc.upc(0);
222 pc.nupc(1);
223 context->pcState(pc);
219 // Floating point registers are left at 0 in netbsd
220 // All registers other than the pc, npc and int regs
221 // are ignored as well.
222}
223
224 // Floating point registers are left at 0 in netbsd
225 // All registers other than the pc, npc and int regs
226 // are ignored as well.
227}
228
224///////////////////////////////////////////////////////////
225// RemoteGDB::setregs
226//
227// Translate the GDB register format into the kernel
228// debugger register format.
229//
230void
229void
231RemoteGDB::setregs()
230RemoteGDB::SPARC64GdbRegCache::setRegs(ThreadContext *context) const
232{
231{
232 for (int i = 0; i < 32; i++) context->setIntReg(i, r.gpr[i]);
233 PCState pc;
233 PCState pc;
234 pc.pc(gdbregs.regs64[RegPc]);
235 pc.npc(gdbregs.regs64[RegNpc]);
234 pc.pc(r.pc);
235 pc.npc(r.npc);
236 pc.nnpc(pc.npc() + sizeof(MachInst));
237 pc.upc(0);
238 pc.nupc(1);
239 context->pcState(pc);
236 pc.nnpc(pc.npc() + sizeof(MachInst));
237 pc.upc(0);
238 pc.nupc(1);
239 context->pcState(pc);
240 for (int x = RegG0; x <= RegI0 + 7; x++)
241 context->setIntReg(x - RegG0, gdbregs.regs64[x]);
242 // Only the integer registers, pc and npc are set in netbsd
240 // Floating point registers are left at 0 in netbsd
241 // All registers other than the pc, npc and int regs
242 // are ignored as well.
243}
243}
244
245
246RemoteGDB::BaseGdbRegCache*
247RemoteGDB::gdbRegs()
248{
249 PSTATE pstate = context->readMiscReg(MISCREG_PSTATE);
250 if (pstate.am)
251 {DPRINTF(GDBRead, "Creating 32-bit GDB\n");
252 return new SPARCGdbRegCache(this);}
253 else
254 {DPRINTF(GDBRead, "Creating 64-bit GDB\n");
255 return new SPARC64GdbRegCache(this);}
256}