1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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147// Determine if the mapping at va..(va+len) is valid.
148//
149bool
150RemoteGDB::acc(Addr va, size_t len)
151{
152 //@Todo In NetBSD, this function checks if all addresses
153 //from va to va + len have valid page mape entries. Not
154 //sure how this will work for other OSes or in general.
155 return true;
156}
157
158///////////////////////////////////////////////////////////
159// RemoteGDB::getregs
160//
161// Translate the kernel debugger register format into
162// the GDB register format.
163void
164RemoteGDB::getregs()
165{
166 memset(gdbregs.regs, 0, gdbregs.size);
167
168 if (context->readMiscRegWithEffect(MISCREG_PSTATE) &
169 PSTATE::am)
170 panic("In 32bit mode\n");
171
172 gdbregs.regs[RegPc] = htobe(context->readPC());
173 gdbregs.regs[RegNpc] = htobe(context->readNextPC());
174 for(int x = RegG0; x <= RegI0 + 7; x++)
175 gdbregs.regs[x] = htobe(context->readIntReg(x - RegG0));
176
177 gdbregs.regs[RegFsr] = htobe(context->readMiscRegWithEffect(MISCREG_FSR));
178 gdbregs.regs[RegFprs] = htobe(context->readMiscRegWithEffect(MISCREG_FPRS));
179 gdbregs.regs[RegY] = htobe(context->readIntReg(NumIntArchRegs + 1));
180 gdbregs.regs[RegState] = htobe(
181 context->readMiscRegWithEffect(MISCREG_CWP) |
182 context->readMiscRegWithEffect(MISCREG_PSTATE) << 8 |
183 context->readMiscRegWithEffect(MISCREG_ASI) << 24 |
184 context->readIntReg(NumIntArchRegs + 2) << 32);
185
186
187 DPRINTF(GDBRead, "PC=%#x\n", gdbregs.regs[RegPc]);
188
189 //Floating point registers are left at 0 in netbsd
190 //All registers other than the pc, npc and int regs
191 //are ignored as well.
192}
193
194///////////////////////////////////////////////////////////

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