process.cc (2665:a124942bacb8) process.cc (2680:246e7104f744)
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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30 */
31
32#include "arch/sparc/isa_traits.hh"
33#include "arch/sparc/process.hh"
34#include "arch/sparc/linux/process.hh"
35#include "arch/sparc/solaris/process.hh"
36#include "base/loader/object_file.hh"
37#include "base/misc.hh"
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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30 */
31
32#include "arch/sparc/isa_traits.hh"
33#include "arch/sparc/process.hh"
34#include "arch/sparc/linux/process.hh"
35#include "arch/sparc/solaris/process.hh"
36#include "base/loader/object_file.hh"
37#include "base/misc.hh"
38#include "cpu/exec_context.hh"
38#include "cpu/thread_context.hh"
39#include "mem/page_table.hh"
40#include "mem/translating_port.hh"
41#include "sim/builder.hh"
42#include "sim/system.hh"
43
44using namespace std;
45using namespace SparcISA;
46

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108void
109SparcLiveProcess::startup()
110{
111 argsInit(MachineBytes, VMPageSize);
112
113 //From the SPARC ABI
114
115 //The process runs in user mode
39#include "mem/page_table.hh"
40#include "mem/translating_port.hh"
41#include "sim/builder.hh"
42#include "sim/system.hh"
43
44using namespace std;
45using namespace SparcISA;
46

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108void
109SparcLiveProcess::startup()
110{
111 argsInit(MachineBytes, VMPageSize);
112
113 //From the SPARC ABI
114
115 //The process runs in user mode
116 execContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE, 0x02);
116 threadContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE, 0x02);
117
118 //Setup default FP state
117
118 //Setup default FP state
119 execContexts[0]->setMiscReg(MISCREG_FSR, 0);
119 threadContexts[0]->setMiscReg(MISCREG_FSR, 0);
120
120
121 execContexts[0]->setMiscReg(MISCREG_TICK, 0);
121 threadContexts[0]->setMiscReg(MISCREG_TICK, 0);
122 //
123 /*
124 * Register window management registers
125 */
126
127 //No windows contain info from other programs
122 //
123 /*
124 * Register window management registers
125 */
126
127 //No windows contain info from other programs
128 execContexts[0]->setMiscRegWithEffect(MISCREG_OTHERWIN, 0);
128 threadContexts[0]->setMiscRegWithEffect(MISCREG_OTHERWIN, 0);
129 //There are no windows to pop
129 //There are no windows to pop
130 execContexts[0]->setMiscRegWithEffect(MISCREG_CANRESTORE, 0);
130 threadContexts[0]->setMiscRegWithEffect(MISCREG_CANRESTORE, 0);
131 //All windows are available to save into
131 //All windows are available to save into
132 execContexts[0]->setMiscRegWithEffect(MISCREG_CANSAVE, NWindows - 2);
132 threadContexts[0]->setMiscRegWithEffect(MISCREG_CANSAVE, NWindows - 2);
133 //All windows are "clean"
133 //All windows are "clean"
134 execContexts[0]->setMiscRegWithEffect(MISCREG_CLEANWIN, NWindows);
134 threadContexts[0]->setMiscRegWithEffect(MISCREG_CLEANWIN, NWindows);
135 //Start with register window 0
135 //Start with register window 0
136 execContexts[0]->setMiscRegWithEffect(MISCREG_CWP, 0);
136 threadContexts[0]->setMiscRegWithEffect(MISCREG_CWP, 0);
137}
138
139m5_auxv_t buildAuxVect(int64_t type, int64_t val)
140{
141 m5_auxv_t result;
142 result.a_type = TheISA::htog(type);
143 result.a_val = TheISA::htog(val);
144 return result;

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306 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
307 (uint8_t*)&zero, 2 * intSize);
308
309 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
310 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
311
312 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
313
137}
138
139m5_auxv_t buildAuxVect(int64_t type, int64_t val)
140{
141 m5_auxv_t result;
142 result.a_type = TheISA::htog(type);
143 result.a_val = TheISA::htog(val);
144 return result;

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306 initVirtMem->writeBlob(auxv_array_base + 2 * intSize * auxv.size(),
307 (uint8_t*)&zero, 2 * intSize);
308
309 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
310 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
311
312 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
313
314 execContexts[0]->setIntReg(ArgumentReg0, argc);
315 execContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
316 execContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
314 threadContexts[0]->setIntReg(ArgumentReg0, argc);
315 threadContexts[0]->setIntReg(ArgumentReg1, argv_array_base);
316 threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
317
318 Addr prog_entry = objFile->entryPoint();
317
318 Addr prog_entry = objFile->entryPoint();
319 execContexts[0]->setPC(prog_entry);
320 execContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
321 execContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
319 threadContexts[0]->setPC(prog_entry);
320 threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
321 threadContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
322
323// num_processes++;
324}
325
326
327BEGIN_DECLARE_SIM_OBJECT_PARAMS(SparcLiveProcess)
328
329 VectorParam<string> cmd;

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323// num_processes++;
324}
325
326
327BEGIN_DECLARE_SIM_OBJECT_PARAMS(SparcLiveProcess)
328
329 VectorParam<string> cmd;

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