1/* 2 * Copyright (c) 2003-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 18 unchanged lines hidden (view full) --- 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#include "arch/sparc/asi.hh" 33#include "arch/sparc/isa_traits.hh" 34#include "arch/sparc/process.hh" |
35#include "arch/sparc/types.hh" |
36#include "base/loader/object_file.hh" 37#include "base/loader/elf_object.hh" 38#include "base/misc.hh" 39#include "cpu/thread_context.hh" 40#include "mem/page_table.hh" 41#include "mem/translating_port.hh" 42#include "sim/system.hh" 43 --- 29 unchanged lines hidden (view full) --- 73 //Initialize these to 0s 74 fillStart = 0; 75 spillStart = 0; 76} 77 78void 79SparcLiveProcess::startup() 80{ |
81 argsInit(sizeof(IntReg), VMPageSize); |
82 83 //From the SPARC ABI 84 85 //The process runs in user mode 86 threadContexts[0]->setMiscRegWithEffect(MISCREG_PSTATE, 0x02); 87 88 //Setup default FP state 89 threadContexts[0]->setMiscReg(MISCREG_FSR, 0); --- 342 unchanged lines hidden --- |