35#include "arch/sparc/process.hh"
36#include "arch/sparc/types.hh"
37#include "base/loader/object_file.hh"
38#include "base/loader/elf_object.hh"
39#include "base/misc.hh"
40#include "cpu/thread_context.hh"
41#include "mem/page_table.hh"
42#include "sim/process_impl.hh"
43#include "mem/translating_port.hh"
44#include "sim/system.hh"
45
46using namespace std;
47using namespace SparcISA;
48
49static const int FirstArgumentReg = 8;
50
51
52SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
53 ObjectFile *objFile, Addr _StackBias)
54 : LiveProcess(params, objFile), StackBias(_StackBias)
55{
56
57 // XXX all the below need to be updated for SPARC - Ali
58 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
59 brk_point = roundUp(brk_point, VMPageSize);
60
61 // Set pointer for next thread stack. Reserve 8M for main stack.
62 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
63
64 //Initialize these to 0s
65 fillStart = 0;
66 spillStart = 0;
67}
68
69void SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc)
70{
71 switch(trapNum)
72 {
73 case 0x01: //Software breakpoint
74 warn("Software breakpoint encountered at pc %#x.\n", tc->readPC());
75 break;
76 case 0x02: //Division by zero
77 warn("Software signaled a division by zero at pc %#x.\n",
78 tc->readPC());
79 break;
80 case 0x03: //Flush window trap
81 flushWindows(tc);
82 break;
83 case 0x04: //Clean windows
84 warn("Ignoring process request for clean register "
85 "windows at pc %#x.\n", tc->readPC());
86 break;
87 case 0x05: //Range check
88 warn("Software signaled a range check at pc %#x.\n",
89 tc->readPC());
90 break;
91 case 0x06: //Fix alignment
92 warn("Ignoring process request for os assisted unaligned accesses "
93 "at pc %#x.\n", tc->readPC());
94 break;
95 case 0x07: //Integer overflow
96 warn("Software signaled an integer overflow at pc %#x.\n",
97 tc->readPC());
98 break;
99 case 0x32: //Get integer condition codes
100 warn("Ignoring process request to get the integer condition codes "
101 "at pc %#x.\n", tc->readPC());
102 break;
103 case 0x33: //Set integer condition codes
104 warn("Ignoring process request to set the integer condition codes "
105 "at pc %#x.\n", tc->readPC());
106 break;
107 default:
108 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
109 }
110}
111
112void
113SparcLiveProcess::startup()
114{
115 Process::startup();
116
117 ThreadContext *tc = system->getThreadContext(contextIds[0]);
118 //From the SPARC ABI
119
120 //Setup default FP state
121 tc->setMiscRegNoEffect(MISCREG_FSR, 0);
122
123 tc->setMiscRegNoEffect(MISCREG_TICK, 0);
124
125 /*
126 * Register window management registers
127 */
128
129 //No windows contain info from other programs
130 //tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
131 tc->setIntReg(NumIntArchRegs + 6, 0);
132 //There are no windows to pop
133 //tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
134 tc->setIntReg(NumIntArchRegs + 4, 0);
135 //All windows are available to save into
136 //tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
137 tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
138 //All windows are "clean"
139 //tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
140 tc->setIntReg(NumIntArchRegs + 5, NWindows);
141 //Start with register window 0
142 tc->setMiscRegNoEffect(MISCREG_CWP, 0);
143 //Always use spill and fill traps 0
144 //tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
145 tc->setIntReg(NumIntArchRegs + 7, 0);
146 //Set the trap level to 0
147 tc->setMiscRegNoEffect(MISCREG_TL, 0);
148 //Set the ASI register to something fixed
149 tc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
150
151 /*
152 * T1 specific registers
153 */
154 //Turn on the icache, dcache, dtb translation, and itb translation.
155 tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
156}
157
158void
159Sparc32LiveProcess::startup()
160{
161 if (checkpointRestored)
162 return;
163
164 SparcLiveProcess::startup();
165
166 ThreadContext *tc = system->getThreadContext(contextIds[0]);
167 //The process runs in user mode with 32 bit addresses
168 tc->setMiscReg(MISCREG_PSTATE, 0x0a);
169
170 argsInit(32 / 8, VMPageSize);
171}
172
173void
174Sparc64LiveProcess::startup()
175{
176 if (checkpointRestored)
177 return;
178
179 SparcLiveProcess::startup();
180
181 ThreadContext *tc = system->getThreadContext(contextIds[0]);
182 //The process runs in user mode
183 tc->setMiscReg(MISCREG_PSTATE, 0x02);
184
185 argsInit(sizeof(IntReg), VMPageSize);
186}
187
188template<class IntType>
189void
190SparcLiveProcess::argsInit(int pageSize)
191{
192 int intSize = sizeof(IntType);
193
194 typedef AuxVector<IntType> auxv_t;
195
196 std::vector<auxv_t> auxv;
197
198 string filename;
199 if(argv.size() < 1)
200 filename = "";
201 else
202 filename = argv[0];
203
204 //Even for a 32 bit process, the ABI says we still need to
205 //maintain double word alignment of the stack pointer.
206 uint64_t align = 16;
207
208 // load object file into target memory
209 objFile->loadSections(initVirtMem);
210
211 enum hardwareCaps
212 {
213 M5_HWCAP_SPARC_FLUSH = 1,
214 M5_HWCAP_SPARC_STBAR = 2,
215 M5_HWCAP_SPARC_SWAP = 4,
216 M5_HWCAP_SPARC_MULDIV = 8,
217 M5_HWCAP_SPARC_V9 = 16,
218 //This one should technically only be set
219 //if there is a cheetah or cheetah_plus tlb,
220 //but we'll use it all the time
221 M5_HWCAP_SPARC_ULTRA3 = 32
222 };
223
224 const int64_t hwcap =
225 M5_HWCAP_SPARC_FLUSH |
226 M5_HWCAP_SPARC_STBAR |
227 M5_HWCAP_SPARC_SWAP |
228 M5_HWCAP_SPARC_MULDIV |
229 M5_HWCAP_SPARC_V9 |
230 M5_HWCAP_SPARC_ULTRA3;
231
232 //Setup the auxilliary vectors. These will already have endian conversion.
233 //Auxilliary vectors are loaded only for elf formatted executables.
234 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
235 if(elfObject)
236 {
237 //Bits which describe the system hardware capabilities
238 auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
239 //The system page size
240 auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
241 //Defined to be 100 in the kernel source.
242 //Frequency at which times() increments
243 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
244 // For statically linked executables, this is the virtual address of the
245 // program header tables if they appear in the executable image
246 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
247 // This is the size of a program header entry from the elf file.
248 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
249 // This is the number of program headers from the original elf file.
250 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
251 //This is the address of the elf "interpreter", It should be set
252 //to 0 for regular executables. It should be something else
253 //(not sure what) for dynamic libraries.
254 auxv.push_back(auxv_t(M5_AT_BASE, 0));
255 //This is hardwired to 0 in the elf loading code in the kernel
256 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
257 //The entry point to the program
258 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
259 //Different user and group IDs
260 auxv.push_back(auxv_t(M5_AT_UID, uid()));
261 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
262 auxv.push_back(auxv_t(M5_AT_GID, gid()));
263 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
264 //Whether to enable "secure mode" in the executable
265 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
266 }
267
268 //Figure out how big the initial stack needs to be
269
270 // The unaccounted for 8 byte 0 at the top of the stack
271 int sentry_size = 8;
272
273 //This is the name of the file which is present on the initial stack
274 //It's purpose is to let the user space linker examine the original file.
275 int file_name_size = filename.size() + 1;
276
277 int env_data_size = 0;
278 for (int i = 0; i < envp.size(); ++i) {
279 env_data_size += envp[i].size() + 1;
280 }
281 int arg_data_size = 0;
282 for (int i = 0; i < argv.size(); ++i) {
283 arg_data_size += argv[i].size() + 1;
284 }
285
286 //The info_block.
287 int base_info_block_size =
288 sentry_size + file_name_size + env_data_size + arg_data_size;
289
290 int info_block_size = roundUp(base_info_block_size, align);
291
292 int info_block_padding = info_block_size - base_info_block_size;
293
294 //Each auxilliary vector is two words
295 int aux_array_size = intSize * 2 * (auxv.size() + 1);
296
297 int envp_array_size = intSize * (envp.size() + 1);
298 int argv_array_size = intSize * (argv.size() + 1);
299
300 int argc_size = intSize;
301 int window_save_size = intSize * 16;
302
303 //Figure out the size of the contents of the actual initial frame
304 int frame_size =
305 aux_array_size +
306 envp_array_size +
307 argv_array_size +
308 argc_size +
309 window_save_size;
310
311 //There needs to be padding after the auxiliary vector data so that the
312 //very bottom of the stack is aligned properly.
313 int aligned_partial_size = roundUp(frame_size, align);
314 int aux_padding = aligned_partial_size - frame_size;
315
316 int space_needed =
317 info_block_size +
318 aux_padding +
319 frame_size;
320
321 stack_min = stack_base - space_needed;
322 stack_min = roundDown(stack_min, align);
323 stack_size = stack_base - stack_min;
324
325 // Allocate space for the stack
326 pTable->allocate(roundDown(stack_min, pageSize),
327 roundUp(stack_size, pageSize));
328
329 // map out initial stack contents
330 IntType sentry_base = stack_base - sentry_size;
331 IntType file_name_base = sentry_base - file_name_size;
332 IntType env_data_base = file_name_base - env_data_size;
333 IntType arg_data_base = env_data_base - arg_data_size;
334 IntType auxv_array_base = arg_data_base -
335 info_block_padding - aux_array_size - aux_padding;
336 IntType envp_array_base = auxv_array_base - envp_array_size;
337 IntType argv_array_base = envp_array_base - argv_array_size;
338 IntType argc_base = argv_array_base - argc_size;
339#if TRACING_ON
340 IntType window_save_base = argc_base - window_save_size;
341#endif
342
343 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
344 DPRINTF(Stack, "%#x - sentry NULL\n", sentry_base);
345 DPRINTF(Stack, "filename = %s\n", filename);
346 DPRINTF(Stack, "%#x - file name\n", file_name_base);
347 DPRINTF(Stack, "%#x - env data\n", env_data_base);
348 DPRINTF(Stack, "%#x - arg data\n", arg_data_base);
349 DPRINTF(Stack, "%#x - auxv array\n", auxv_array_base);
350 DPRINTF(Stack, "%#x - envp array\n", envp_array_base);
351 DPRINTF(Stack, "%#x - argv array\n", argv_array_base);
352 DPRINTF(Stack, "%#x - argc \n", argc_base);
353 DPRINTF(Stack, "%#x - window save\n", window_save_base);
354 DPRINTF(Stack, "%#x - stack min\n", stack_min);
355
356 assert(window_save_base == stack_min);
357
358 // write contents to stack
359
360 // figure out argc
361 IntType argc = argv.size();
362 IntType guestArgc = SparcISA::htog(argc);
363
364 //Write out the sentry void *
365 uint64_t sentry_NULL = 0;
366 initVirtMem->writeBlob(sentry_base,
367 (uint8_t*)&sentry_NULL, sentry_size);
368
369 //Write the file name
370 initVirtMem->writeString(file_name_base, filename.c_str());
371
372 //Copy the aux stuff
373 for(int x = 0; x < auxv.size(); x++)
374 {
375 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
376 (uint8_t*)&(auxv[x].a_type), intSize);
377 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
378 (uint8_t*)&(auxv[x].a_val), intSize);
379 }
380
381 //Write out the terminating zeroed auxilliary vector
382 const IntType zero = 0;
383 initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
384 (uint8_t*)&zero, intSize);
385 initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
386 (uint8_t*)&zero, intSize);
387
388 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
389 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
390
391 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
392
393 //Set up space for the trap handlers into the processes address space.
394 //Since the stack grows down and there is reserved address space abov
395 //it, we can put stuff above it and stay out of the way.
396 fillStart = stack_base;
397 spillStart = fillStart + sizeof(MachInst) * numFillInsts;
398
399 ThreadContext *tc = system->getThreadContext(contextIds[0]);
400 //Set up the thread context to start running the process
401 //assert(NumArgumentRegs >= 2);
402 //tc->setIntReg(ArgumentReg[0], argc);
403 //tc->setIntReg(ArgumentReg[1], argv_array_base);
404 tc->setIntReg(StackPointerReg, stack_min - StackBias);
405
406 // %g1 is a pointer to a function that should be run at exit. Since we
407 // don't have anything like that, it should be set to 0.
408 tc->setIntReg(1, 0);
409
410 Addr prog_entry = objFile->entryPoint();
411 tc->setPC(prog_entry);
412 tc->setNextPC(prog_entry + sizeof(MachInst));
413 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
414
415 //Align the "stack_min" to a page boundary.
416 stack_min = roundDown(stack_min, pageSize);
417
418// num_processes++;
419}
420
421void
422Sparc64LiveProcess::argsInit(int intSize, int pageSize)
423{
424 SparcLiveProcess::argsInit<uint64_t>(pageSize);
425
426 // Stuff the trap handlers into the process address space
427 initVirtMem->writeBlob(fillStart,
428 (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
429 initVirtMem->writeBlob(spillStart,
430 (uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts);
431}
432
433void
434Sparc32LiveProcess::argsInit(int intSize, int pageSize)
435{
436 SparcLiveProcess::argsInit<uint32_t>(pageSize);
437
438 // Stuff the trap handlers into the process address space
439 initVirtMem->writeBlob(fillStart,
440 (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
441 initVirtMem->writeBlob(spillStart,
442 (uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts);
443}
444
445void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
446{
447 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
448 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
449 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
450 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
451 MiscReg origCWP = CWP;
452 CWP = (CWP + Cansave + 2) % NWindows;
453 while(NWindows - 2 - Cansave != 0)
454 {
455 if (Otherwin) {
456 panic("Otherwin non-zero.\n");
457 } else {
458 tc->setMiscReg(MISCREG_CWP, CWP);
459 //Do the stores
460 IntReg sp = tc->readIntReg(StackPointerReg);
461 for (int index = 16; index < 32; index++) {
462 uint32_t regVal = tc->readIntReg(index);
463 regVal = htog(regVal);
464 if (!tc->getMemPort()->tryWriteBlob(
465 sp + (index - 16) * 4, (uint8_t *)®Val, 4)) {
466 warn("Failed to save register to the stack when "
467 "flushing windows.\n");
468 }
469 }
470 Canrestore--;
471 Cansave++;
472 CWP = (CWP + 1) % NWindows;
473 }
474 }
475 tc->setIntReg(NumIntArchRegs + 3, Cansave);
476 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
477 tc->setMiscReg(MISCREG_CWP, origCWP);
478}
479
480void Sparc64LiveProcess::flushWindows(ThreadContext *tc)
481{
482 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
483 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
484 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
485 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
486 MiscReg origCWP = CWP;
487 CWP = (CWP + Cansave + 2) % NWindows;
488 while(NWindows - 2 - Cansave != 0)
489 {
490 if (Otherwin) {
491 panic("Otherwin non-zero.\n");
492 } else {
493 tc->setMiscReg(MISCREG_CWP, CWP);
494 //Do the stores
495 IntReg sp = tc->readIntReg(StackPointerReg);
496 for (int index = 16; index < 32; index++) {
497 IntReg regVal = tc->readIntReg(index);
498 regVal = htog(regVal);
499 if (!tc->getMemPort()->tryWriteBlob(
500 sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) {
501 warn("Failed to save register to the stack when "
502 "flushing windows.\n");
503 }
504 }
505 Canrestore--;
506 Cansave++;
507 CWP = (CWP + 1) % NWindows;
508 }
509 }
510 tc->setIntReg(NumIntArchRegs + 3, Cansave);
511 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
512 tc->setMiscReg(MISCREG_CWP, origCWP);
513}
514
515IntReg
516Sparc32LiveProcess::getSyscallArg(ThreadContext *tc, int i)
517{
518 assert(i < 6);
519 return bits(tc->readIntReg(FirstArgumentReg + i), 31, 0);
520}
521
522void
523Sparc32LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
524{
525 assert(i < 6);
526 tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0));
527}
528
529IntReg
530Sparc64LiveProcess::getSyscallArg(ThreadContext *tc, int i)
531{
532 assert(i < 6);
533 return tc->readIntReg(FirstArgumentReg + i);
534}
535
536void
537Sparc64LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
538{
539 assert(i < 6);
540 tc->setIntReg(FirstArgumentReg + i, val);
541}
542
543void
544SparcLiveProcess::setSyscallReturn(ThreadContext *tc,
545 SyscallReturn return_value)
546{
547 // check for error condition. SPARC syscall convention is to
548 // indicate success/failure in reg the carry bit of the ccr
549 // and put the return value itself in the standard return value reg ().
550 if (return_value.successful()) {
551 // no error, clear XCC.C
552 tc->setIntReg(NumIntArchRegs + 2,
553 tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
554 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) & 0xEE);
555 IntReg val = return_value.value();
556 if (bits(tc->readMiscRegNoEffect(
557 SparcISA::MISCREG_PSTATE), 3, 3)) {
558 val = bits(val, 31, 0);
559 }
560 tc->setIntReg(ReturnValueReg, val);
561 } else {
562 // got an error, set XCC.C
563 tc->setIntReg(NumIntArchRegs + 2,
564 tc->readIntReg(NumIntArchRegs + 2) | 0x11);
565 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) | 0x11);
566 IntReg val = -return_value.value();
567 if (bits(tc->readMiscRegNoEffect(
568 SparcISA::MISCREG_PSTATE), 3, 3)) {
569 val = bits(val, 31, 0);
570 }
571 tc->setIntReg(ReturnValueReg, val);
572 }
573}
| 36#include "arch/sparc/process.hh"
37#include "arch/sparc/types.hh"
38#include "base/loader/object_file.hh"
39#include "base/loader/elf_object.hh"
40#include "base/misc.hh"
41#include "cpu/thread_context.hh"
42#include "mem/page_table.hh"
43#include "sim/process_impl.hh"
44#include "mem/translating_port.hh"
45#include "sim/system.hh"
46
47using namespace std;
48using namespace SparcISA;
49
50static const int FirstArgumentReg = 8;
51
52
53SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
54 ObjectFile *objFile, Addr _StackBias)
55 : LiveProcess(params, objFile), StackBias(_StackBias)
56{
57
58 // XXX all the below need to be updated for SPARC - Ali
59 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
60 brk_point = roundUp(brk_point, VMPageSize);
61
62 // Set pointer for next thread stack. Reserve 8M for main stack.
63 next_thread_stack_base = stack_base - (8 * 1024 * 1024);
64
65 //Initialize these to 0s
66 fillStart = 0;
67 spillStart = 0;
68}
69
70void SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc)
71{
72 switch(trapNum)
73 {
74 case 0x01: //Software breakpoint
75 warn("Software breakpoint encountered at pc %#x.\n", tc->readPC());
76 break;
77 case 0x02: //Division by zero
78 warn("Software signaled a division by zero at pc %#x.\n",
79 tc->readPC());
80 break;
81 case 0x03: //Flush window trap
82 flushWindows(tc);
83 break;
84 case 0x04: //Clean windows
85 warn("Ignoring process request for clean register "
86 "windows at pc %#x.\n", tc->readPC());
87 break;
88 case 0x05: //Range check
89 warn("Software signaled a range check at pc %#x.\n",
90 tc->readPC());
91 break;
92 case 0x06: //Fix alignment
93 warn("Ignoring process request for os assisted unaligned accesses "
94 "at pc %#x.\n", tc->readPC());
95 break;
96 case 0x07: //Integer overflow
97 warn("Software signaled an integer overflow at pc %#x.\n",
98 tc->readPC());
99 break;
100 case 0x32: //Get integer condition codes
101 warn("Ignoring process request to get the integer condition codes "
102 "at pc %#x.\n", tc->readPC());
103 break;
104 case 0x33: //Set integer condition codes
105 warn("Ignoring process request to set the integer condition codes "
106 "at pc %#x.\n", tc->readPC());
107 break;
108 default:
109 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
110 }
111}
112
113void
114SparcLiveProcess::startup()
115{
116 Process::startup();
117
118 ThreadContext *tc = system->getThreadContext(contextIds[0]);
119 //From the SPARC ABI
120
121 //Setup default FP state
122 tc->setMiscRegNoEffect(MISCREG_FSR, 0);
123
124 tc->setMiscRegNoEffect(MISCREG_TICK, 0);
125
126 /*
127 * Register window management registers
128 */
129
130 //No windows contain info from other programs
131 //tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
132 tc->setIntReg(NumIntArchRegs + 6, 0);
133 //There are no windows to pop
134 //tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
135 tc->setIntReg(NumIntArchRegs + 4, 0);
136 //All windows are available to save into
137 //tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
138 tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
139 //All windows are "clean"
140 //tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
141 tc->setIntReg(NumIntArchRegs + 5, NWindows);
142 //Start with register window 0
143 tc->setMiscRegNoEffect(MISCREG_CWP, 0);
144 //Always use spill and fill traps 0
145 //tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
146 tc->setIntReg(NumIntArchRegs + 7, 0);
147 //Set the trap level to 0
148 tc->setMiscRegNoEffect(MISCREG_TL, 0);
149 //Set the ASI register to something fixed
150 tc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
151
152 /*
153 * T1 specific registers
154 */
155 //Turn on the icache, dcache, dtb translation, and itb translation.
156 tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
157}
158
159void
160Sparc32LiveProcess::startup()
161{
162 if (checkpointRestored)
163 return;
164
165 SparcLiveProcess::startup();
166
167 ThreadContext *tc = system->getThreadContext(contextIds[0]);
168 //The process runs in user mode with 32 bit addresses
169 tc->setMiscReg(MISCREG_PSTATE, 0x0a);
170
171 argsInit(32 / 8, VMPageSize);
172}
173
174void
175Sparc64LiveProcess::startup()
176{
177 if (checkpointRestored)
178 return;
179
180 SparcLiveProcess::startup();
181
182 ThreadContext *tc = system->getThreadContext(contextIds[0]);
183 //The process runs in user mode
184 tc->setMiscReg(MISCREG_PSTATE, 0x02);
185
186 argsInit(sizeof(IntReg), VMPageSize);
187}
188
189template<class IntType>
190void
191SparcLiveProcess::argsInit(int pageSize)
192{
193 int intSize = sizeof(IntType);
194
195 typedef AuxVector<IntType> auxv_t;
196
197 std::vector<auxv_t> auxv;
198
199 string filename;
200 if(argv.size() < 1)
201 filename = "";
202 else
203 filename = argv[0];
204
205 //Even for a 32 bit process, the ABI says we still need to
206 //maintain double word alignment of the stack pointer.
207 uint64_t align = 16;
208
209 // load object file into target memory
210 objFile->loadSections(initVirtMem);
211
212 enum hardwareCaps
213 {
214 M5_HWCAP_SPARC_FLUSH = 1,
215 M5_HWCAP_SPARC_STBAR = 2,
216 M5_HWCAP_SPARC_SWAP = 4,
217 M5_HWCAP_SPARC_MULDIV = 8,
218 M5_HWCAP_SPARC_V9 = 16,
219 //This one should technically only be set
220 //if there is a cheetah or cheetah_plus tlb,
221 //but we'll use it all the time
222 M5_HWCAP_SPARC_ULTRA3 = 32
223 };
224
225 const int64_t hwcap =
226 M5_HWCAP_SPARC_FLUSH |
227 M5_HWCAP_SPARC_STBAR |
228 M5_HWCAP_SPARC_SWAP |
229 M5_HWCAP_SPARC_MULDIV |
230 M5_HWCAP_SPARC_V9 |
231 M5_HWCAP_SPARC_ULTRA3;
232
233 //Setup the auxilliary vectors. These will already have endian conversion.
234 //Auxilliary vectors are loaded only for elf formatted executables.
235 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
236 if(elfObject)
237 {
238 //Bits which describe the system hardware capabilities
239 auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
240 //The system page size
241 auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
242 //Defined to be 100 in the kernel source.
243 //Frequency at which times() increments
244 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
245 // For statically linked executables, this is the virtual address of the
246 // program header tables if they appear in the executable image
247 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
248 // This is the size of a program header entry from the elf file.
249 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
250 // This is the number of program headers from the original elf file.
251 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
252 //This is the address of the elf "interpreter", It should be set
253 //to 0 for regular executables. It should be something else
254 //(not sure what) for dynamic libraries.
255 auxv.push_back(auxv_t(M5_AT_BASE, 0));
256 //This is hardwired to 0 in the elf loading code in the kernel
257 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
258 //The entry point to the program
259 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
260 //Different user and group IDs
261 auxv.push_back(auxv_t(M5_AT_UID, uid()));
262 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
263 auxv.push_back(auxv_t(M5_AT_GID, gid()));
264 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
265 //Whether to enable "secure mode" in the executable
266 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
267 }
268
269 //Figure out how big the initial stack needs to be
270
271 // The unaccounted for 8 byte 0 at the top of the stack
272 int sentry_size = 8;
273
274 //This is the name of the file which is present on the initial stack
275 //It's purpose is to let the user space linker examine the original file.
276 int file_name_size = filename.size() + 1;
277
278 int env_data_size = 0;
279 for (int i = 0; i < envp.size(); ++i) {
280 env_data_size += envp[i].size() + 1;
281 }
282 int arg_data_size = 0;
283 for (int i = 0; i < argv.size(); ++i) {
284 arg_data_size += argv[i].size() + 1;
285 }
286
287 //The info_block.
288 int base_info_block_size =
289 sentry_size + file_name_size + env_data_size + arg_data_size;
290
291 int info_block_size = roundUp(base_info_block_size, align);
292
293 int info_block_padding = info_block_size - base_info_block_size;
294
295 //Each auxilliary vector is two words
296 int aux_array_size = intSize * 2 * (auxv.size() + 1);
297
298 int envp_array_size = intSize * (envp.size() + 1);
299 int argv_array_size = intSize * (argv.size() + 1);
300
301 int argc_size = intSize;
302 int window_save_size = intSize * 16;
303
304 //Figure out the size of the contents of the actual initial frame
305 int frame_size =
306 aux_array_size +
307 envp_array_size +
308 argv_array_size +
309 argc_size +
310 window_save_size;
311
312 //There needs to be padding after the auxiliary vector data so that the
313 //very bottom of the stack is aligned properly.
314 int aligned_partial_size = roundUp(frame_size, align);
315 int aux_padding = aligned_partial_size - frame_size;
316
317 int space_needed =
318 info_block_size +
319 aux_padding +
320 frame_size;
321
322 stack_min = stack_base - space_needed;
323 stack_min = roundDown(stack_min, align);
324 stack_size = stack_base - stack_min;
325
326 // Allocate space for the stack
327 pTable->allocate(roundDown(stack_min, pageSize),
328 roundUp(stack_size, pageSize));
329
330 // map out initial stack contents
331 IntType sentry_base = stack_base - sentry_size;
332 IntType file_name_base = sentry_base - file_name_size;
333 IntType env_data_base = file_name_base - env_data_size;
334 IntType arg_data_base = env_data_base - arg_data_size;
335 IntType auxv_array_base = arg_data_base -
336 info_block_padding - aux_array_size - aux_padding;
337 IntType envp_array_base = auxv_array_base - envp_array_size;
338 IntType argv_array_base = envp_array_base - argv_array_size;
339 IntType argc_base = argv_array_base - argc_size;
340#if TRACING_ON
341 IntType window_save_base = argc_base - window_save_size;
342#endif
343
344 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
345 DPRINTF(Stack, "%#x - sentry NULL\n", sentry_base);
346 DPRINTF(Stack, "filename = %s\n", filename);
347 DPRINTF(Stack, "%#x - file name\n", file_name_base);
348 DPRINTF(Stack, "%#x - env data\n", env_data_base);
349 DPRINTF(Stack, "%#x - arg data\n", arg_data_base);
350 DPRINTF(Stack, "%#x - auxv array\n", auxv_array_base);
351 DPRINTF(Stack, "%#x - envp array\n", envp_array_base);
352 DPRINTF(Stack, "%#x - argv array\n", argv_array_base);
353 DPRINTF(Stack, "%#x - argc \n", argc_base);
354 DPRINTF(Stack, "%#x - window save\n", window_save_base);
355 DPRINTF(Stack, "%#x - stack min\n", stack_min);
356
357 assert(window_save_base == stack_min);
358
359 // write contents to stack
360
361 // figure out argc
362 IntType argc = argv.size();
363 IntType guestArgc = SparcISA::htog(argc);
364
365 //Write out the sentry void *
366 uint64_t sentry_NULL = 0;
367 initVirtMem->writeBlob(sentry_base,
368 (uint8_t*)&sentry_NULL, sentry_size);
369
370 //Write the file name
371 initVirtMem->writeString(file_name_base, filename.c_str());
372
373 //Copy the aux stuff
374 for(int x = 0; x < auxv.size(); x++)
375 {
376 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
377 (uint8_t*)&(auxv[x].a_type), intSize);
378 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
379 (uint8_t*)&(auxv[x].a_val), intSize);
380 }
381
382 //Write out the terminating zeroed auxilliary vector
383 const IntType zero = 0;
384 initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
385 (uint8_t*)&zero, intSize);
386 initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
387 (uint8_t*)&zero, intSize);
388
389 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
390 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
391
392 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
393
394 //Set up space for the trap handlers into the processes address space.
395 //Since the stack grows down and there is reserved address space abov
396 //it, we can put stuff above it and stay out of the way.
397 fillStart = stack_base;
398 spillStart = fillStart + sizeof(MachInst) * numFillInsts;
399
400 ThreadContext *tc = system->getThreadContext(contextIds[0]);
401 //Set up the thread context to start running the process
402 //assert(NumArgumentRegs >= 2);
403 //tc->setIntReg(ArgumentReg[0], argc);
404 //tc->setIntReg(ArgumentReg[1], argv_array_base);
405 tc->setIntReg(StackPointerReg, stack_min - StackBias);
406
407 // %g1 is a pointer to a function that should be run at exit. Since we
408 // don't have anything like that, it should be set to 0.
409 tc->setIntReg(1, 0);
410
411 Addr prog_entry = objFile->entryPoint();
412 tc->setPC(prog_entry);
413 tc->setNextPC(prog_entry + sizeof(MachInst));
414 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
415
416 //Align the "stack_min" to a page boundary.
417 stack_min = roundDown(stack_min, pageSize);
418
419// num_processes++;
420}
421
422void
423Sparc64LiveProcess::argsInit(int intSize, int pageSize)
424{
425 SparcLiveProcess::argsInit<uint64_t>(pageSize);
426
427 // Stuff the trap handlers into the process address space
428 initVirtMem->writeBlob(fillStart,
429 (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
430 initVirtMem->writeBlob(spillStart,
431 (uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts);
432}
433
434void
435Sparc32LiveProcess::argsInit(int intSize, int pageSize)
436{
437 SparcLiveProcess::argsInit<uint32_t>(pageSize);
438
439 // Stuff the trap handlers into the process address space
440 initVirtMem->writeBlob(fillStart,
441 (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
442 initVirtMem->writeBlob(spillStart,
443 (uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts);
444}
445
446void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
447{
448 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
449 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
450 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
451 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
452 MiscReg origCWP = CWP;
453 CWP = (CWP + Cansave + 2) % NWindows;
454 while(NWindows - 2 - Cansave != 0)
455 {
456 if (Otherwin) {
457 panic("Otherwin non-zero.\n");
458 } else {
459 tc->setMiscReg(MISCREG_CWP, CWP);
460 //Do the stores
461 IntReg sp = tc->readIntReg(StackPointerReg);
462 for (int index = 16; index < 32; index++) {
463 uint32_t regVal = tc->readIntReg(index);
464 regVal = htog(regVal);
465 if (!tc->getMemPort()->tryWriteBlob(
466 sp + (index - 16) * 4, (uint8_t *)®Val, 4)) {
467 warn("Failed to save register to the stack when "
468 "flushing windows.\n");
469 }
470 }
471 Canrestore--;
472 Cansave++;
473 CWP = (CWP + 1) % NWindows;
474 }
475 }
476 tc->setIntReg(NumIntArchRegs + 3, Cansave);
477 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
478 tc->setMiscReg(MISCREG_CWP, origCWP);
479}
480
481void Sparc64LiveProcess::flushWindows(ThreadContext *tc)
482{
483 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
484 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
485 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
486 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
487 MiscReg origCWP = CWP;
488 CWP = (CWP + Cansave + 2) % NWindows;
489 while(NWindows - 2 - Cansave != 0)
490 {
491 if (Otherwin) {
492 panic("Otherwin non-zero.\n");
493 } else {
494 tc->setMiscReg(MISCREG_CWP, CWP);
495 //Do the stores
496 IntReg sp = tc->readIntReg(StackPointerReg);
497 for (int index = 16; index < 32; index++) {
498 IntReg regVal = tc->readIntReg(index);
499 regVal = htog(regVal);
500 if (!tc->getMemPort()->tryWriteBlob(
501 sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) {
502 warn("Failed to save register to the stack when "
503 "flushing windows.\n");
504 }
505 }
506 Canrestore--;
507 Cansave++;
508 CWP = (CWP + 1) % NWindows;
509 }
510 }
511 tc->setIntReg(NumIntArchRegs + 3, Cansave);
512 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
513 tc->setMiscReg(MISCREG_CWP, origCWP);
514}
515
516IntReg
517Sparc32LiveProcess::getSyscallArg(ThreadContext *tc, int i)
518{
519 assert(i < 6);
520 return bits(tc->readIntReg(FirstArgumentReg + i), 31, 0);
521}
522
523void
524Sparc32LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
525{
526 assert(i < 6);
527 tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0));
528}
529
530IntReg
531Sparc64LiveProcess::getSyscallArg(ThreadContext *tc, int i)
532{
533 assert(i < 6);
534 return tc->readIntReg(FirstArgumentReg + i);
535}
536
537void
538Sparc64LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val)
539{
540 assert(i < 6);
541 tc->setIntReg(FirstArgumentReg + i, val);
542}
543
544void
545SparcLiveProcess::setSyscallReturn(ThreadContext *tc,
546 SyscallReturn return_value)
547{
548 // check for error condition. SPARC syscall convention is to
549 // indicate success/failure in reg the carry bit of the ccr
550 // and put the return value itself in the standard return value reg ().
551 if (return_value.successful()) {
552 // no error, clear XCC.C
553 tc->setIntReg(NumIntArchRegs + 2,
554 tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
555 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) & 0xEE);
556 IntReg val = return_value.value();
557 if (bits(tc->readMiscRegNoEffect(
558 SparcISA::MISCREG_PSTATE), 3, 3)) {
559 val = bits(val, 31, 0);
560 }
561 tc->setIntReg(ReturnValueReg, val);
562 } else {
563 // got an error, set XCC.C
564 tc->setIntReg(NumIntArchRegs + 2,
565 tc->readIntReg(NumIntArchRegs + 2) | 0x11);
566 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) | 0x11);
567 IntReg val = -return_value.value();
568 if (bits(tc->readMiscRegNoEffect(
569 SparcISA::MISCREG_PSTATE), 3, 3)) {
570 val = bits(val, 31, 0);
571 }
572 tc->setIntReg(ReturnValueReg, val);
573 }
574}
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