61{
62 fatal_if(!params->useArchPT, "Arch page tables not implemented.");
63 // Initialize these to 0s
64 fillStart = 0;
65 spillStart = 0;
66}
67
68void
69SparcProcess::handleTrap(int trapNum, ThreadContext *tc, Fault *fault)
70{
71 PCState pc = tc->pcState();
72 switch (trapNum) {
73 case 0x01: // Software breakpoint
74 warn("Software breakpoint encountered at pc %#x.\n", pc.pc());
75 break;
76 case 0x02: // Division by zero
77 warn("Software signaled a division by zero at pc %#x.\n", pc.pc());
78 break;
79 case 0x03: // Flush window trap
80 flushWindows(tc);
81 break;
82 case 0x04: // Clean windows
83 warn("Ignoring process request for clean register "
84 "windows at pc %#x.\n", pc.pc());
85 break;
86 case 0x05: // Range check
87 warn("Software signaled a range check at pc %#x.\n", pc.pc());
88 break;
89 case 0x06: // Fix alignment
90 warn("Ignoring process request for os assisted unaligned accesses "
91 "at pc %#x.\n", pc.pc());
92 break;
93 case 0x07: // Integer overflow
94 warn("Software signaled an integer overflow at pc %#x.\n", pc.pc());
95 break;
96 case 0x32: // Get integer condition codes
97 warn("Ignoring process request to get the integer condition codes "
98 "at pc %#x.\n", pc.pc());
99 break;
100 case 0x33: // Set integer condition codes
101 warn("Ignoring process request to set the integer condition codes "
102 "at pc %#x.\n", pc.pc());
103 break;
104 default:
105 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
106 }
107}
108
109void
110SparcProcess::initState()
111{
112 Process::initState();
113
114 ThreadContext *tc = system->getThreadContext(contextIds[0]);
115 // From the SPARC ABI
116
117 // Setup default FP state
118 tc->setMiscRegNoEffect(MISCREG_FSR, 0);
119
120 tc->setMiscRegNoEffect(MISCREG_TICK, 0);
121
122 /*
123 * Register window management registers
124 */
125
126 // No windows contain info from other programs
127 // tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
128 tc->setIntReg(NumIntArchRegs + 6, 0);
129 // There are no windows to pop
130 // tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
131 tc->setIntReg(NumIntArchRegs + 4, 0);
132 // All windows are available to save into
133 // tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
134 tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
135 // All windows are "clean"
136 // tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
137 tc->setIntReg(NumIntArchRegs + 5, NWindows);
138 // Start with register window 0
139 tc->setMiscReg(MISCREG_CWP, 0);
140 // Always use spill and fill traps 0
141 // tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
142 tc->setIntReg(NumIntArchRegs + 7, 0);
143 // Set the trap level to 0
144 tc->setMiscRegNoEffect(MISCREG_TL, 0);
145 // Set the ASI register to something fixed
146 tc->setMiscReg(MISCREG_ASI, ASI_PRIMARY);
147
148 // Set the MMU Primary Context Register to hold the process' pid
149 tc->setMiscReg(MISCREG_MMU_P_CONTEXT, _pid);
150
151 /*
152 * T1 specific registers
153 */
154 // Turn on the icache, dcache, dtb translation, and itb translation.
155 tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
156}
157
158void
159Sparc32Process::initState()
160{
161 SparcProcess::initState();
162
163 ThreadContext *tc = system->getThreadContext(contextIds[0]);
164 // The process runs in user mode with 32 bit addresses
165 PSTATE pstate = 0;
166 pstate.ie = 1;
167 pstate.am = 1;
168 tc->setMiscReg(MISCREG_PSTATE, pstate);
169
170 argsInit(32 / 8, PageBytes);
171}
172
173void
174Sparc64Process::initState()
175{
176 SparcProcess::initState();
177
178 ThreadContext *tc = system->getThreadContext(contextIds[0]);
179 // The process runs in user mode
180 PSTATE pstate = 0;
181 pstate.ie = 1;
182 tc->setMiscReg(MISCREG_PSTATE, pstate);
183
184 argsInit(sizeof(IntReg), PageBytes);
185}
186
187template<class IntType>
188void
189SparcProcess::argsInit(int pageSize)
190{
191 int intSize = sizeof(IntType);
192
193 typedef AuxVector<IntType> auxv_t;
194
195 std::vector<auxv_t> auxv;
196
197 string filename;
198 if (argv.size() < 1)
199 filename = "";
200 else
201 filename = argv[0];
202
203 // Even for a 32 bit process, the ABI says we still need to
204 // maintain double word alignment of the stack pointer.
205 uint64_t align = 16;
206
207 // Patch the ld_bias for dynamic executables.
208 updateBias();
209
210 // load object file into target memory
211 objFile->loadSections(initVirtMem);
212
213 enum hardwareCaps
214 {
215 M5_HWCAP_SPARC_FLUSH = 1,
216 M5_HWCAP_SPARC_STBAR = 2,
217 M5_HWCAP_SPARC_SWAP = 4,
218 M5_HWCAP_SPARC_MULDIV = 8,
219 M5_HWCAP_SPARC_V9 = 16,
220 // This one should technically only be set
221 // if there is a cheetah or cheetah_plus tlb,
222 // but we'll use it all the time
223 M5_HWCAP_SPARC_ULTRA3 = 32
224 };
225
226 const int64_t hwcap =
227 M5_HWCAP_SPARC_FLUSH |
228 M5_HWCAP_SPARC_STBAR |
229 M5_HWCAP_SPARC_SWAP |
230 M5_HWCAP_SPARC_MULDIV |
231 M5_HWCAP_SPARC_V9 |
232 M5_HWCAP_SPARC_ULTRA3;
233
234 // Setup the auxilliary vectors. These will already have endian conversion.
235 // Auxilliary vectors are loaded only for elf formatted executables.
236 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
237 if (elfObject) {
238 // Bits which describe the system hardware capabilities
239 auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
240 // The system page size
241 auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::PageBytes));
242 // Defined to be 100 in the kernel source.
243 // Frequency at which times() increments
244 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
245 // For statically linked executables, this is the virtual address of the
246 // program header tables if they appear in the executable image
247 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
248 // This is the size of a program header entry from the elf file.
249 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
250 // This is the number of program headers from the original elf file.
251 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
252 // This is the base address of the ELF interpreter; it should be
253 // zero for static executables or contain the base address for
254 // dynamic executables.
255 auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
256 // This is hardwired to 0 in the elf loading code in the kernel
257 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
258 // The entry point to the program
259 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
260 // Different user and group IDs
261 auxv.push_back(auxv_t(M5_AT_UID, uid()));
262 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
263 auxv.push_back(auxv_t(M5_AT_GID, gid()));
264 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
265 // Whether to enable "secure mode" in the executable
266 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
267 }
268
269 // Figure out how big the initial stack needs to be
270
271 // The unaccounted for 8 byte 0 at the top of the stack
272 int sentry_size = 8;
273
274 // This is the name of the file which is present on the initial stack
275 // It's purpose is to let the user space linker examine the original file.
276 int file_name_size = filename.size() + 1;
277
278 int env_data_size = 0;
279 for (int i = 0; i < envp.size(); ++i) {
280 env_data_size += envp[i].size() + 1;
281 }
282 int arg_data_size = 0;
283 for (int i = 0; i < argv.size(); ++i) {
284 arg_data_size += argv[i].size() + 1;
285 }
286
287 // The info_block.
288 int base_info_block_size =
289 sentry_size + file_name_size + env_data_size + arg_data_size;
290
291 int info_block_size = roundUp(base_info_block_size, align);
292
293 int info_block_padding = info_block_size - base_info_block_size;
294
295 // Each auxilliary vector is two words
296 int aux_array_size = intSize * 2 * (auxv.size() + 1);
297
298 int envp_array_size = intSize * (envp.size() + 1);
299 int argv_array_size = intSize * (argv.size() + 1);
300
301 int argc_size = intSize;
302 int window_save_size = intSize * 16;
303
304 // Figure out the size of the contents of the actual initial frame
305 int frame_size =
306 aux_array_size +
307 envp_array_size +
308 argv_array_size +
309 argc_size +
310 window_save_size;
311
312 // There needs to be padding after the auxiliary vector data so that the
313 // very bottom of the stack is aligned properly.
314 int aligned_partial_size = roundUp(frame_size, align);
315 int aux_padding = aligned_partial_size - frame_size;
316
317 int space_needed =
318 info_block_size +
319 aux_padding +
320 frame_size;
321
322 memState->setStackMin(memState->getStackBase() - space_needed);
323 memState->setStackMin(roundDown(memState->getStackMin(), align));
324 memState->setStackSize(memState->getStackBase() - memState->getStackMin());
325
326 // Allocate space for the stack
327 allocateMem(roundDown(memState->getStackMin(), pageSize),
328 roundUp(memState->getStackSize(), pageSize));
329
330 // map out initial stack contents
331 IntType sentry_base = memState->getStackBase() - sentry_size;
332 IntType file_name_base = sentry_base - file_name_size;
333 IntType env_data_base = file_name_base - env_data_size;
334 IntType arg_data_base = env_data_base - arg_data_size;
335 IntType auxv_array_base = arg_data_base -
336 info_block_padding - aux_array_size - aux_padding;
337 IntType envp_array_base = auxv_array_base - envp_array_size;
338 IntType argv_array_base = envp_array_base - argv_array_size;
339 IntType argc_base = argv_array_base - argc_size;
340#if TRACING_ON
341 IntType window_save_base = argc_base - window_save_size;
342#endif
343
344 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
345 DPRINTF(Stack, "%#x - sentry NULL\n", sentry_base);
346 DPRINTF(Stack, "filename = %s\n", filename);
347 DPRINTF(Stack, "%#x - file name\n", file_name_base);
348 DPRINTF(Stack, "%#x - env data\n", env_data_base);
349 DPRINTF(Stack, "%#x - arg data\n", arg_data_base);
350 DPRINTF(Stack, "%#x - auxv array\n", auxv_array_base);
351 DPRINTF(Stack, "%#x - envp array\n", envp_array_base);
352 DPRINTF(Stack, "%#x - argv array\n", argv_array_base);
353 DPRINTF(Stack, "%#x - argc \n", argc_base);
354 DPRINTF(Stack, "%#x - window save\n", window_save_base);
355 DPRINTF(Stack, "%#x - stack min\n", memState->getStackMin());
356
357 assert(window_save_base == memState->getStackMin());
358
359 // write contents to stack
360
361 // figure out argc
362 IntType argc = argv.size();
363 IntType guestArgc = SparcISA::htog(argc);
364
365 // Write out the sentry void *
366 uint64_t sentry_NULL = 0;
367 initVirtMem.writeBlob(sentry_base,
368 (uint8_t*)&sentry_NULL, sentry_size);
369
370 // Write the file name
371 initVirtMem.writeString(file_name_base, filename.c_str());
372
373 // Copy the aux stuff
374 for (int x = 0; x < auxv.size(); x++) {
375 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
376 (uint8_t*)&(auxv[x].a_type), intSize);
377 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
378 (uint8_t*)&(auxv[x].a_val), intSize);
379 }
380
381 // Write out the terminating zeroed auxilliary vector
382 const IntType zero = 0;
383 initVirtMem.writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
384 (uint8_t*)&zero, intSize);
385 initVirtMem.writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
386 (uint8_t*)&zero, intSize);
387
388 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
389 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
390
391 initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
392
393 // Set up space for the trap handlers into the processes address space.
394 // Since the stack grows down and there is reserved address space abov
395 // it, we can put stuff above it and stay out of the way.
396 fillStart = memState->getStackBase();
397 spillStart = fillStart + sizeof(MachInst) * numFillInsts;
398
399 ThreadContext *tc = system->getThreadContext(contextIds[0]);
400 // Set up the thread context to start running the process
401 // assert(NumArgumentRegs >= 2);
402 // tc->setIntReg(ArgumentReg[0], argc);
403 // tc->setIntReg(ArgumentReg[1], argv_array_base);
404 tc->setIntReg(StackPointerReg, memState->getStackMin() - StackBias);
405
406 // %g1 is a pointer to a function that should be run at exit. Since we
407 // don't have anything like that, it should be set to 0.
408 tc->setIntReg(1, 0);
409
410 tc->pcState(getStartPC());
411
412 // Align the "stack_min" to a page boundary.
413 memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
414}
415
416void
417Sparc64Process::argsInit(int intSize, int pageSize)
418{
419 SparcProcess::argsInit<uint64_t>(pageSize);
420
421 // Stuff the trap handlers into the process address space
422 initVirtMem.writeBlob(fillStart,
423 (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
424 initVirtMem.writeBlob(spillStart,
425 (uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts);
426}
427
428void
429Sparc32Process::argsInit(int intSize, int pageSize)
430{
431 SparcProcess::argsInit<uint32_t>(pageSize);
432
433 // Stuff the trap handlers into the process address space
434 initVirtMem.writeBlob(fillStart,
435 (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
436 initVirtMem.writeBlob(spillStart,
437 (uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts);
438}
439
440void Sparc32Process::flushWindows(ThreadContext *tc)
441{
442 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
443 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
444 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
445 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
446 MiscReg origCWP = CWP;
447 CWP = (CWP + Cansave + 2) % NWindows;
448 while (NWindows - 2 - Cansave != 0) {
449 if (Otherwin) {
450 panic("Otherwin non-zero.\n");
451 } else {
452 tc->setMiscReg(MISCREG_CWP, CWP);
453 // Do the stores
454 IntReg sp = tc->readIntReg(StackPointerReg);
455 for (int index = 16; index < 32; index++) {
456 uint32_t regVal = tc->readIntReg(index);
457 regVal = htog(regVal);
458 if (!tc->getMemProxy().tryWriteBlob(
459 sp + (index - 16) * 4, (uint8_t *)®Val, 4)) {
460 warn("Failed to save register to the stack when "
461 "flushing windows.\n");
462 }
463 }
464 Canrestore--;
465 Cansave++;
466 CWP = (CWP + 1) % NWindows;
467 }
468 }
469 tc->setIntReg(NumIntArchRegs + 3, Cansave);
470 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
471 tc->setMiscReg(MISCREG_CWP, origCWP);
472}
473
474void
475Sparc64Process::flushWindows(ThreadContext *tc)
476{
477 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
478 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
479 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
480 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
481 MiscReg origCWP = CWP;
482 CWP = (CWP + Cansave + 2) % NWindows;
483 while (NWindows - 2 - Cansave != 0) {
484 if (Otherwin) {
485 panic("Otherwin non-zero.\n");
486 } else {
487 tc->setMiscReg(MISCREG_CWP, CWP);
488 // Do the stores
489 IntReg sp = tc->readIntReg(StackPointerReg);
490 for (int index = 16; index < 32; index++) {
491 IntReg regVal = tc->readIntReg(index);
492 regVal = htog(regVal);
493 if (!tc->getMemProxy().tryWriteBlob(
494 sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) {
495 warn("Failed to save register to the stack when "
496 "flushing windows.\n");
497 }
498 }
499 Canrestore--;
500 Cansave++;
501 CWP = (CWP + 1) % NWindows;
502 }
503 }
504 tc->setIntReg(NumIntArchRegs + 3, Cansave);
505 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
506 tc->setMiscReg(MISCREG_CWP, origCWP);
507}
508
509IntReg
510Sparc32Process::getSyscallArg(ThreadContext *tc, int &i)
511{
512 assert(i < 6);
513 return bits(tc->readIntReg(FirstArgumentReg + i++), 31, 0);
514}
515
516void
517Sparc32Process::setSyscallArg(ThreadContext *tc, int i, IntReg val)
518{
519 assert(i < 6);
520 tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0));
521}
522
523IntReg
524Sparc64Process::getSyscallArg(ThreadContext *tc, int &i)
525{
526 assert(i < 6);
527 return tc->readIntReg(FirstArgumentReg + i++);
528}
529
530void
531Sparc64Process::setSyscallArg(ThreadContext *tc, int i, IntReg val)
532{
533 assert(i < 6);
534 tc->setIntReg(FirstArgumentReg + i, val);
535}
536
537void
538SparcProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
539{
540 // check for error condition. SPARC syscall convention is to
541 // indicate success/failure in reg the carry bit of the ccr
542 // and put the return value itself in the standard return value reg ().
543 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
544 if (sysret.successful()) {
545 // no error, clear XCC.C
546 tc->setIntReg(NumIntArchRegs + 2,
547 tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
548 IntReg val = sysret.returnValue();
549 if (pstate.am)
550 val = bits(val, 31, 0);
551 tc->setIntReg(ReturnValueReg, val);
552 } else {
553 // got an error, set XCC.C
554 tc->setIntReg(NumIntArchRegs + 2,
555 tc->readIntReg(NumIntArchRegs + 2) | 0x11);
556 IntReg val = sysret.errnoValue();
557 if (pstate.am)
558 val = bits(val, 31, 0);
559 tc->setIntReg(ReturnValueReg, val);
560 }
561}
| 62{
63 fatal_if(!params->useArchPT, "Arch page tables not implemented.");
64 // Initialize these to 0s
65 fillStart = 0;
66 spillStart = 0;
67}
68
69void
70SparcProcess::handleTrap(int trapNum, ThreadContext *tc, Fault *fault)
71{
72 PCState pc = tc->pcState();
73 switch (trapNum) {
74 case 0x01: // Software breakpoint
75 warn("Software breakpoint encountered at pc %#x.\n", pc.pc());
76 break;
77 case 0x02: // Division by zero
78 warn("Software signaled a division by zero at pc %#x.\n", pc.pc());
79 break;
80 case 0x03: // Flush window trap
81 flushWindows(tc);
82 break;
83 case 0x04: // Clean windows
84 warn("Ignoring process request for clean register "
85 "windows at pc %#x.\n", pc.pc());
86 break;
87 case 0x05: // Range check
88 warn("Software signaled a range check at pc %#x.\n", pc.pc());
89 break;
90 case 0x06: // Fix alignment
91 warn("Ignoring process request for os assisted unaligned accesses "
92 "at pc %#x.\n", pc.pc());
93 break;
94 case 0x07: // Integer overflow
95 warn("Software signaled an integer overflow at pc %#x.\n", pc.pc());
96 break;
97 case 0x32: // Get integer condition codes
98 warn("Ignoring process request to get the integer condition codes "
99 "at pc %#x.\n", pc.pc());
100 break;
101 case 0x33: // Set integer condition codes
102 warn("Ignoring process request to set the integer condition codes "
103 "at pc %#x.\n", pc.pc());
104 break;
105 default:
106 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
107 }
108}
109
110void
111SparcProcess::initState()
112{
113 Process::initState();
114
115 ThreadContext *tc = system->getThreadContext(contextIds[0]);
116 // From the SPARC ABI
117
118 // Setup default FP state
119 tc->setMiscRegNoEffect(MISCREG_FSR, 0);
120
121 tc->setMiscRegNoEffect(MISCREG_TICK, 0);
122
123 /*
124 * Register window management registers
125 */
126
127 // No windows contain info from other programs
128 // tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
129 tc->setIntReg(NumIntArchRegs + 6, 0);
130 // There are no windows to pop
131 // tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
132 tc->setIntReg(NumIntArchRegs + 4, 0);
133 // All windows are available to save into
134 // tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
135 tc->setIntReg(NumIntArchRegs + 3, NWindows - 2);
136 // All windows are "clean"
137 // tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
138 tc->setIntReg(NumIntArchRegs + 5, NWindows);
139 // Start with register window 0
140 tc->setMiscReg(MISCREG_CWP, 0);
141 // Always use spill and fill traps 0
142 // tc->setMiscRegNoEffect(MISCREG_WSTATE, 0);
143 tc->setIntReg(NumIntArchRegs + 7, 0);
144 // Set the trap level to 0
145 tc->setMiscRegNoEffect(MISCREG_TL, 0);
146 // Set the ASI register to something fixed
147 tc->setMiscReg(MISCREG_ASI, ASI_PRIMARY);
148
149 // Set the MMU Primary Context Register to hold the process' pid
150 tc->setMiscReg(MISCREG_MMU_P_CONTEXT, _pid);
151
152 /*
153 * T1 specific registers
154 */
155 // Turn on the icache, dcache, dtb translation, and itb translation.
156 tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
157}
158
159void
160Sparc32Process::initState()
161{
162 SparcProcess::initState();
163
164 ThreadContext *tc = system->getThreadContext(contextIds[0]);
165 // The process runs in user mode with 32 bit addresses
166 PSTATE pstate = 0;
167 pstate.ie = 1;
168 pstate.am = 1;
169 tc->setMiscReg(MISCREG_PSTATE, pstate);
170
171 argsInit(32 / 8, PageBytes);
172}
173
174void
175Sparc64Process::initState()
176{
177 SparcProcess::initState();
178
179 ThreadContext *tc = system->getThreadContext(contextIds[0]);
180 // The process runs in user mode
181 PSTATE pstate = 0;
182 pstate.ie = 1;
183 tc->setMiscReg(MISCREG_PSTATE, pstate);
184
185 argsInit(sizeof(IntReg), PageBytes);
186}
187
188template<class IntType>
189void
190SparcProcess::argsInit(int pageSize)
191{
192 int intSize = sizeof(IntType);
193
194 typedef AuxVector<IntType> auxv_t;
195
196 std::vector<auxv_t> auxv;
197
198 string filename;
199 if (argv.size() < 1)
200 filename = "";
201 else
202 filename = argv[0];
203
204 // Even for a 32 bit process, the ABI says we still need to
205 // maintain double word alignment of the stack pointer.
206 uint64_t align = 16;
207
208 // Patch the ld_bias for dynamic executables.
209 updateBias();
210
211 // load object file into target memory
212 objFile->loadSections(initVirtMem);
213
214 enum hardwareCaps
215 {
216 M5_HWCAP_SPARC_FLUSH = 1,
217 M5_HWCAP_SPARC_STBAR = 2,
218 M5_HWCAP_SPARC_SWAP = 4,
219 M5_HWCAP_SPARC_MULDIV = 8,
220 M5_HWCAP_SPARC_V9 = 16,
221 // This one should technically only be set
222 // if there is a cheetah or cheetah_plus tlb,
223 // but we'll use it all the time
224 M5_HWCAP_SPARC_ULTRA3 = 32
225 };
226
227 const int64_t hwcap =
228 M5_HWCAP_SPARC_FLUSH |
229 M5_HWCAP_SPARC_STBAR |
230 M5_HWCAP_SPARC_SWAP |
231 M5_HWCAP_SPARC_MULDIV |
232 M5_HWCAP_SPARC_V9 |
233 M5_HWCAP_SPARC_ULTRA3;
234
235 // Setup the auxilliary vectors. These will already have endian conversion.
236 // Auxilliary vectors are loaded only for elf formatted executables.
237 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
238 if (elfObject) {
239 // Bits which describe the system hardware capabilities
240 auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
241 // The system page size
242 auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::PageBytes));
243 // Defined to be 100 in the kernel source.
244 // Frequency at which times() increments
245 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
246 // For statically linked executables, this is the virtual address of the
247 // program header tables if they appear in the executable image
248 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
249 // This is the size of a program header entry from the elf file.
250 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
251 // This is the number of program headers from the original elf file.
252 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
253 // This is the base address of the ELF interpreter; it should be
254 // zero for static executables or contain the base address for
255 // dynamic executables.
256 auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
257 // This is hardwired to 0 in the elf loading code in the kernel
258 auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
259 // The entry point to the program
260 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
261 // Different user and group IDs
262 auxv.push_back(auxv_t(M5_AT_UID, uid()));
263 auxv.push_back(auxv_t(M5_AT_EUID, euid()));
264 auxv.push_back(auxv_t(M5_AT_GID, gid()));
265 auxv.push_back(auxv_t(M5_AT_EGID, egid()));
266 // Whether to enable "secure mode" in the executable
267 auxv.push_back(auxv_t(M5_AT_SECURE, 0));
268 }
269
270 // Figure out how big the initial stack needs to be
271
272 // The unaccounted for 8 byte 0 at the top of the stack
273 int sentry_size = 8;
274
275 // This is the name of the file which is present on the initial stack
276 // It's purpose is to let the user space linker examine the original file.
277 int file_name_size = filename.size() + 1;
278
279 int env_data_size = 0;
280 for (int i = 0; i < envp.size(); ++i) {
281 env_data_size += envp[i].size() + 1;
282 }
283 int arg_data_size = 0;
284 for (int i = 0; i < argv.size(); ++i) {
285 arg_data_size += argv[i].size() + 1;
286 }
287
288 // The info_block.
289 int base_info_block_size =
290 sentry_size + file_name_size + env_data_size + arg_data_size;
291
292 int info_block_size = roundUp(base_info_block_size, align);
293
294 int info_block_padding = info_block_size - base_info_block_size;
295
296 // Each auxilliary vector is two words
297 int aux_array_size = intSize * 2 * (auxv.size() + 1);
298
299 int envp_array_size = intSize * (envp.size() + 1);
300 int argv_array_size = intSize * (argv.size() + 1);
301
302 int argc_size = intSize;
303 int window_save_size = intSize * 16;
304
305 // Figure out the size of the contents of the actual initial frame
306 int frame_size =
307 aux_array_size +
308 envp_array_size +
309 argv_array_size +
310 argc_size +
311 window_save_size;
312
313 // There needs to be padding after the auxiliary vector data so that the
314 // very bottom of the stack is aligned properly.
315 int aligned_partial_size = roundUp(frame_size, align);
316 int aux_padding = aligned_partial_size - frame_size;
317
318 int space_needed =
319 info_block_size +
320 aux_padding +
321 frame_size;
322
323 memState->setStackMin(memState->getStackBase() - space_needed);
324 memState->setStackMin(roundDown(memState->getStackMin(), align));
325 memState->setStackSize(memState->getStackBase() - memState->getStackMin());
326
327 // Allocate space for the stack
328 allocateMem(roundDown(memState->getStackMin(), pageSize),
329 roundUp(memState->getStackSize(), pageSize));
330
331 // map out initial stack contents
332 IntType sentry_base = memState->getStackBase() - sentry_size;
333 IntType file_name_base = sentry_base - file_name_size;
334 IntType env_data_base = file_name_base - env_data_size;
335 IntType arg_data_base = env_data_base - arg_data_size;
336 IntType auxv_array_base = arg_data_base -
337 info_block_padding - aux_array_size - aux_padding;
338 IntType envp_array_base = auxv_array_base - envp_array_size;
339 IntType argv_array_base = envp_array_base - argv_array_size;
340 IntType argc_base = argv_array_base - argc_size;
341#if TRACING_ON
342 IntType window_save_base = argc_base - window_save_size;
343#endif
344
345 DPRINTF(Stack, "The addresses of items on the initial stack:\n");
346 DPRINTF(Stack, "%#x - sentry NULL\n", sentry_base);
347 DPRINTF(Stack, "filename = %s\n", filename);
348 DPRINTF(Stack, "%#x - file name\n", file_name_base);
349 DPRINTF(Stack, "%#x - env data\n", env_data_base);
350 DPRINTF(Stack, "%#x - arg data\n", arg_data_base);
351 DPRINTF(Stack, "%#x - auxv array\n", auxv_array_base);
352 DPRINTF(Stack, "%#x - envp array\n", envp_array_base);
353 DPRINTF(Stack, "%#x - argv array\n", argv_array_base);
354 DPRINTF(Stack, "%#x - argc \n", argc_base);
355 DPRINTF(Stack, "%#x - window save\n", window_save_base);
356 DPRINTF(Stack, "%#x - stack min\n", memState->getStackMin());
357
358 assert(window_save_base == memState->getStackMin());
359
360 // write contents to stack
361
362 // figure out argc
363 IntType argc = argv.size();
364 IntType guestArgc = SparcISA::htog(argc);
365
366 // Write out the sentry void *
367 uint64_t sentry_NULL = 0;
368 initVirtMem.writeBlob(sentry_base,
369 (uint8_t*)&sentry_NULL, sentry_size);
370
371 // Write the file name
372 initVirtMem.writeString(file_name_base, filename.c_str());
373
374 // Copy the aux stuff
375 for (int x = 0; x < auxv.size(); x++) {
376 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
377 (uint8_t*)&(auxv[x].a_type), intSize);
378 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
379 (uint8_t*)&(auxv[x].a_val), intSize);
380 }
381
382 // Write out the terminating zeroed auxilliary vector
383 const IntType zero = 0;
384 initVirtMem.writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
385 (uint8_t*)&zero, intSize);
386 initVirtMem.writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
387 (uint8_t*)&zero, intSize);
388
389 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
390 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
391
392 initVirtMem.writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
393
394 // Set up space for the trap handlers into the processes address space.
395 // Since the stack grows down and there is reserved address space abov
396 // it, we can put stuff above it and stay out of the way.
397 fillStart = memState->getStackBase();
398 spillStart = fillStart + sizeof(MachInst) * numFillInsts;
399
400 ThreadContext *tc = system->getThreadContext(contextIds[0]);
401 // Set up the thread context to start running the process
402 // assert(NumArgumentRegs >= 2);
403 // tc->setIntReg(ArgumentReg[0], argc);
404 // tc->setIntReg(ArgumentReg[1], argv_array_base);
405 tc->setIntReg(StackPointerReg, memState->getStackMin() - StackBias);
406
407 // %g1 is a pointer to a function that should be run at exit. Since we
408 // don't have anything like that, it should be set to 0.
409 tc->setIntReg(1, 0);
410
411 tc->pcState(getStartPC());
412
413 // Align the "stack_min" to a page boundary.
414 memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
415}
416
417void
418Sparc64Process::argsInit(int intSize, int pageSize)
419{
420 SparcProcess::argsInit<uint64_t>(pageSize);
421
422 // Stuff the trap handlers into the process address space
423 initVirtMem.writeBlob(fillStart,
424 (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
425 initVirtMem.writeBlob(spillStart,
426 (uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts);
427}
428
429void
430Sparc32Process::argsInit(int intSize, int pageSize)
431{
432 SparcProcess::argsInit<uint32_t>(pageSize);
433
434 // Stuff the trap handlers into the process address space
435 initVirtMem.writeBlob(fillStart,
436 (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
437 initVirtMem.writeBlob(spillStart,
438 (uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts);
439}
440
441void Sparc32Process::flushWindows(ThreadContext *tc)
442{
443 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
444 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
445 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
446 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
447 MiscReg origCWP = CWP;
448 CWP = (CWP + Cansave + 2) % NWindows;
449 while (NWindows - 2 - Cansave != 0) {
450 if (Otherwin) {
451 panic("Otherwin non-zero.\n");
452 } else {
453 tc->setMiscReg(MISCREG_CWP, CWP);
454 // Do the stores
455 IntReg sp = tc->readIntReg(StackPointerReg);
456 for (int index = 16; index < 32; index++) {
457 uint32_t regVal = tc->readIntReg(index);
458 regVal = htog(regVal);
459 if (!tc->getMemProxy().tryWriteBlob(
460 sp + (index - 16) * 4, (uint8_t *)®Val, 4)) {
461 warn("Failed to save register to the stack when "
462 "flushing windows.\n");
463 }
464 }
465 Canrestore--;
466 Cansave++;
467 CWP = (CWP + 1) % NWindows;
468 }
469 }
470 tc->setIntReg(NumIntArchRegs + 3, Cansave);
471 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
472 tc->setMiscReg(MISCREG_CWP, origCWP);
473}
474
475void
476Sparc64Process::flushWindows(ThreadContext *tc)
477{
478 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
479 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
480 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
481 MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
482 MiscReg origCWP = CWP;
483 CWP = (CWP + Cansave + 2) % NWindows;
484 while (NWindows - 2 - Cansave != 0) {
485 if (Otherwin) {
486 panic("Otherwin non-zero.\n");
487 } else {
488 tc->setMiscReg(MISCREG_CWP, CWP);
489 // Do the stores
490 IntReg sp = tc->readIntReg(StackPointerReg);
491 for (int index = 16; index < 32; index++) {
492 IntReg regVal = tc->readIntReg(index);
493 regVal = htog(regVal);
494 if (!tc->getMemProxy().tryWriteBlob(
495 sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) {
496 warn("Failed to save register to the stack when "
497 "flushing windows.\n");
498 }
499 }
500 Canrestore--;
501 Cansave++;
502 CWP = (CWP + 1) % NWindows;
503 }
504 }
505 tc->setIntReg(NumIntArchRegs + 3, Cansave);
506 tc->setIntReg(NumIntArchRegs + 4, Canrestore);
507 tc->setMiscReg(MISCREG_CWP, origCWP);
508}
509
510IntReg
511Sparc32Process::getSyscallArg(ThreadContext *tc, int &i)
512{
513 assert(i < 6);
514 return bits(tc->readIntReg(FirstArgumentReg + i++), 31, 0);
515}
516
517void
518Sparc32Process::setSyscallArg(ThreadContext *tc, int i, IntReg val)
519{
520 assert(i < 6);
521 tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0));
522}
523
524IntReg
525Sparc64Process::getSyscallArg(ThreadContext *tc, int &i)
526{
527 assert(i < 6);
528 return tc->readIntReg(FirstArgumentReg + i++);
529}
530
531void
532Sparc64Process::setSyscallArg(ThreadContext *tc, int i, IntReg val)
533{
534 assert(i < 6);
535 tc->setIntReg(FirstArgumentReg + i, val);
536}
537
538void
539SparcProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
540{
541 // check for error condition. SPARC syscall convention is to
542 // indicate success/failure in reg the carry bit of the ccr
543 // and put the return value itself in the standard return value reg ().
544 PSTATE pstate = tc->readMiscRegNoEffect(MISCREG_PSTATE);
545 if (sysret.successful()) {
546 // no error, clear XCC.C
547 tc->setIntReg(NumIntArchRegs + 2,
548 tc->readIntReg(NumIntArchRegs + 2) & 0xEE);
549 IntReg val = sysret.returnValue();
550 if (pstate.am)
551 val = bits(val, 31, 0);
552 tc->setIntReg(ReturnValueReg, val);
553 } else {
554 // got an error, set XCC.C
555 tc->setIntReg(NumIntArchRegs + 2,
556 tc->readIntReg(NumIntArchRegs + 2) | 0x11);
557 IntReg val = sysret.errnoValue();
558 if (pstate.am)
559 val = bits(val, 31, 0);
560 tc->setIntReg(ReturnValueReg, val);
561 }
562}
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